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Cleanup some cases found by SPMI
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@tannergooding
tannergooding committed May 7, 2024
1 parent 47d01d0 commit 40ffaa3
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Showing 5 changed files with 32 additions and 24 deletions.
22 changes: 11 additions & 11 deletions src/coreclr/jit/emitxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -10948,7 +10948,7 @@ void emitter::emitDispInsHex(instrDesc* id, BYTE* code, size_t sz)
//
void emitter::emitDispEmbBroadcastCount(instrDesc* id) const
{
if (!IsAvx512OrPriorInstruction(id->idIns()) || !id->idIsEvexbContextSet())
if (!IsEvexEncodableInstruction(id->idIns()) || !id->idIsEvexbContextSet())
{
return;
}
Expand Down Expand Up @@ -10995,7 +10995,7 @@ void emitter::emitDispEmbRounding(instrDesc* id) const
//
void emitter::emitDispEmbMasking(instrDesc* id) const
{
if (!IsAvx512OrPriorInstruction(id->idIns()))
if (!IsEvexEncodableInstruction(id->idIns()))
{
return;
}
Expand Down Expand Up @@ -11215,7 +11215,7 @@ void emitter::emitDispIns(

case IF_CNS:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));

val = emitGetInsSC(id);
#ifdef TARGET_AMD64
Expand Down Expand Up @@ -11260,7 +11260,7 @@ void emitter::emitDispIns(
case IF_AWR:
case IF_ARW:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));

if (((ins == INS_call) || (ins == INS_tail_i_jmp)) && id->idIsCallRegPtr())
{
Expand Down Expand Up @@ -11554,7 +11554,7 @@ void emitter::emitDispIns(
case IF_SWR:
case IF_SRW:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
printf("%s", sstr);

#if !FEATURE_FIXED_OUT_ARGS
Expand Down Expand Up @@ -12106,7 +12106,7 @@ void emitter::emitDispIns(
case IF_RWR:
case IF_RRW:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
printf("%s", emitRegName(id->idReg1(), attr));
emitDispShift(ins);
break;
Expand Down Expand Up @@ -12317,7 +12317,7 @@ void emitter::emitDispIns(

case IF_RWR_MRD_OFF:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
printf("%s, %s", emitRegName(id->idReg1(), attr), "offset");
offs = emitGetInsDsp(id);
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
Expand Down Expand Up @@ -12372,7 +12372,7 @@ void emitter::emitDispIns(
case IF_MWR:
case IF_MRW:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
printf("%s", sstr);
offs = emitGetInsDsp(id);
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
Expand All @@ -12382,7 +12382,7 @@ void emitter::emitDispIns(

case IF_MRD_OFF:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
printf("offset ");
offs = emitGetInsDsp(id);
emitDispClsVar(id->idAddr()->iiaFieldHnd, offs, ID_INFO_DSP_RELOC);
Expand Down Expand Up @@ -12417,7 +12417,7 @@ void emitter::emitDispIns(
case IF_RWR_LABEL:
case IF_SWR_LABEL:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));

if (ins == INS_lea)
{
Expand Down Expand Up @@ -12460,7 +12460,7 @@ void emitter::emitDispIns(
case IF_METHOD:
case IF_METHPTR:
{
assert(!IsAvx512OrPriorInstruction(id->idIns()));
assert(!IsEvexEncodableInstruction(id->idIns()));
methodName = emitComp->eeGetMethodFullName((CORINFO_METHOD_HANDLE)id->idDebugOnlyInfo()->idMemCookie);

if (id->idInsFmt() == IF_METHPTR)
Expand Down
1 change: 1 addition & 0 deletions src/coreclr/jit/hwintrinsicxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -302,6 +302,7 @@ int HWIntrinsicInfo::lookupImmUpperBound(NamedIntrinsic id)
case NI_AVX_Compare:
case NI_AVX_CompareScalar:
case NI_AVX512F_Compare:
case NI_AVX512F_CompareMask:
{
assert(!HWIntrinsicInfo::HasFullRangeImm(id));
return 31; // enum FloatComparisonMode has 32 values
Expand Down
27 changes: 17 additions & 10 deletions src/coreclr/jit/lowerxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3101,7 +3101,13 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
}
}

if (!varTypeIsMask(condition))
if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
{
GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
BlockRange().Remove(condition);
condition = tmp;
}
else if (!varTypeIsMask(condition))
{
if (!condition->OperIsHWIntrinsic())
{
Expand Down Expand Up @@ -3224,22 +3230,21 @@ GenTree* Lowering::LowerHWIntrinsicTernaryLogic(GenTreeHWIntrinsic* node)
default:
{
assert(!HWIntrinsicInfo::ReturnsPerElementMask(cndId));
cndId = NI_Illegal;
break;
}
}

if (cndId == NI_Illegal)
{
break;
}

cndNode->gtType = TYP_MASK;
cndNode->ChangeHWIntrinsicId(cndId);
}

if (condition->OperIsHWIntrinsic(NI_AVX512F_ConvertMaskToVector))
{
GenTree* tmp = condition->AsHWIntrinsic()->Op(1);
BlockRange().Remove(condition);
condition = tmp;
break;
}

assert(varTypeIsMask(condition));
node->ResetHWIntrinsicId(NI_AVX512F_BlendVariableMask, comp, selectFalse, selectTrue, condition);
BlockRange().Remove(op4);
break;
Expand Down Expand Up @@ -8511,6 +8516,7 @@ bool Lowering::IsContainableHWIntrinsicOp(GenTreeHWIntrinsic* parentNode, GenTre
case NI_AVX2_ShuffleLow:
case NI_AVX512F_AlignRight32:
case NI_AVX512F_AlignRight64:
case NI_AVX512F_CompareMask:
case NI_AVX512F_Fixup:
case NI_AVX512F_GetMantissa:
case NI_AVX512F_Permute2x64:
Expand Down Expand Up @@ -9073,12 +9079,12 @@ void Lowering::TryFoldCnsVecForEmbeddedBroadcast(GenTreeHWIntrinsic* parentNode,
CorInfoType simdBaseJitType = parentNode->GetSimdBaseJitType();
unsigned simdSize = parentNode->GetSimdSize();
bool isCreatedFromScalar = true;
int elementCount = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);

if (simdType == TYP_MASK)
{
simdType = Compiler::getSIMDTypeForSize(simdSize);
}
int elementCount = GenTreeVecCon::ElementCount(genTypeSize(simdType), simdBaseType);

switch (simdBaseType)
{
Expand Down Expand Up @@ -10449,6 +10455,7 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)
case NI_AVX2_Permute2x128:
case NI_AVX512F_AlignRight32:
case NI_AVX512F_AlignRight64:
case NI_AVX512F_CompareMask:
case NI_AVX512F_GetMantissaScalar:
case NI_AVX512F_InsertVector128:
case NI_AVX512F_InsertVector256:
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/lsrabuild.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3605,7 +3605,7 @@ int LinearScan::BuildDelayFreeUses(GenTree* node,
else if (node->OperIsHWIntrinsic())
{
assert(node->AsHWIntrinsic()->GetOperandCount() == 1);
use = BuildUse(node->AsHWIntrinsic()->Op(1), candidates);
return BuildDelayFreeUses(node->AsHWIntrinsic()->Op(1), rmwNode, candidates, useRefPositionRef);
}
#endif
else if (!node->OperIsIndir())
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/lsraxarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2543,7 +2543,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou

for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
{
assert(varTypeIsSIMD(operand));
assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
srcCount += BuildDelayFreeUses(operand, op1);
}
}
Expand All @@ -2556,7 +2556,7 @@ int LinearScan::BuildHWIntrinsic(GenTreeHWIntrinsic* intrinsicTree, int* pDstCou

for (GenTree* operand : op2->AsHWIntrinsic()->Operands())
{
assert(varTypeIsSIMD(operand));
assert(varTypeIsSIMD(operand) || varTypeIsInt(operand));
srcCount += BuildOperandUses(operand);
}
}
Expand Down

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