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RISC-V NativeAOT port #106223

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am11 opened this issue Aug 10, 2024 · 11 comments
Open

RISC-V NativeAOT port #106223

am11 opened this issue Aug 10, 2024 · 11 comments
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arch-riscv Related to the RISC-V architecture area-NativeAOT-coreclr
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@am11
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am11 commented Aug 10, 2024

This is to track the progress of nativeaot port on riscv64 architecture.

WIP initial translation (based on @sunlijun-610's LA64 port):
main...am11:runtime:feature/nativeaot/riscv64-port

@am11 am11 added area-NativeAOT-coreclr arch-riscv Related to the RISC-V architecture labels Aug 10, 2024
@dotnet-policy-service dotnet-policy-service bot added the untriaged New issue has not been triaged by the area owner label Aug 10, 2024
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Tagging subscribers to this area: @agocke, @MichalStrehovsky, @jkotas
See info in area-owners.md if you want to be subscribed.

@am11
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am11 commented Aug 10, 2024

cc @dotnet/samsung, @filipnavara

If someone wants take over, let me know. I can also give ssh access to riscv computer (bianbu OS, Debian derivative) if needed for testing. 👍

@am11
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am11 commented Aug 12, 2024

Some assertions are failing at build-time in AsmOffset* and llvm-libunwind due to the sizes of various structs. llvm-libunwind is getting 96 bytes size difference in UnwindCursor<A, R> vs. unw_cursor_t which is a mystery. See the TODO added in src/native/external/llvm-libunwind/src/UnwindCursor.hpp, that template function is there temporarily to print the sizes on stderr during the build.

Also, I've used the register names we have in coreclr/pal. Some of them might not be needed, but I'm not sure since llvm-libunwind uses different names X1,X2,X3.. while coreclr/pal is using T1,T2,T3.. so I used the latter and handled the mapping in src/coreclr/nativeaot/Runtime/unix/UnwindHelpers.cpp.

@MichalStrehovsky MichalStrehovsky added this to the Future milestone Aug 12, 2024
@MichalStrehovsky MichalStrehovsky removed the untriaged New issue has not been triaged by the area owner label Aug 12, 2024
@am11
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am11 commented Aug 23, 2024

Applied changes from #106225.

FWIW, this is my workflow:

# on macOS arm64
$ cd runtime
$ docker run -e ROOTFS_DIR=/crossrootfs/riscv64 -v$(pwd):/runtime -w /runtime --rm \
    --platform linux/arm64 -it ubuntu

$ eng/common/native/install-dependencies.sh 
$ apt install -y debootstrap
$ eng/common/cross/build-rootfs.sh riscv64 noble --skipunmount --rootfsdir /crossrootfs/riscv64
$ src/coreclr/build-runtime.sh -cross -riscv64

# once nativeaot runtime ^ starts building in silo, we can try a full build
# rm -rf artifacts
# ./build.sh clr+libs+packs -cross --arch riscv64

currently it is not getting too far 😅

...
[ 45%] Building CXX object nativeaot/Runtime/Full/CMakeFiles/Runtime.WorkstationGC.dir/__/__/__/gc/unix/events.cpp.o
[ 45%] Building CXX object classlibnative/bcltype/CMakeFiles/bcltype.dir/system.cpp.o
In file included from /runtime/src/coreclr/nativeaot/Runtime/AsmOffsetsVerify.cpp:43:
In file included from /runtime/src/coreclr/nativeaot/Runtime/AsmOffsets.h:79:
/runtime/src/coreclr/nativeaot/Runtime/riscv64/AsmOffsetsCpu.h:10:1: error: static assertion failed due to requirement '(sizeof(ExInfo) == 2120) || (sizeof(ExInfo) > 2120)': Bad asm size for 'ExInfo', the actual size is smaller than 0x848.
   10 | PLAT_ASM_SIZEOF(848, ExInfo)
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~
/runtime/src/coreclr/nativeaot/Runtime/AsmOffsetsVerify.cpp:36:19: note: expanded from macro 'PLAT_ASM_SIZEOF'
   36 |     static_assert((sizeof(cls) == 0x##size) || (sizeof(cls) > 0x##size), "Bad asm size for '" #cls "', the actual size is smaller than 0x" #size "."); \
      |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In file included from /runtime/src/coreclr/nativeaot/Runtime/AsmOffsetsVerify.cpp:43:
In file included from /runtime/src/coreclr/nativeaot/Runtime/AsmOffsets.h:79:
/runtime/src/coreclr/nativeaot/Runtime/riscv64/AsmOffsetsCpu.h:15:1: error: static assertion failed due to requirement '(__builtin_offsetof(ExInfo, m_passNumber) == 28) || (__builtin_offsetof(ExInfo, m_passNumber) > 28)': Bad asm offset for 'ExInfo.m_passNumber', the actual offset is smaller than 0x1C.
   15 | PLAT_ASM_OFFSET(1C, ExInfo, m_passNumber)
      | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
/runtime/src/coreclr/nativeaot/Runtime/AsmOffsetsVerify.cpp:32:19: note: expanded from macro 'PLAT_ASM_OFFSET'
   32 |     static_assert((offsetof(cls, member) == 0x##offset) || (offsetof(cls, member) > 0x##offset), "Bad asm offset for '" #cls "." #member "', the actual offset is smaller than 0x" #offset "."); \
      |                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
...

@filipnavara
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I tried to compile your branch and I ended up pretty much at the same spot. Currently away from computer, but this should be easy to fix…

@am11
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am11 commented Sep 29, 2024

@filipnavara, have you had a chance to check out the assertion failures? No rush—just wondering if there are any blockers or details we need to sort out. Thanks! 👍

@filipnavara
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Unfortunately no, still tackling some things for .NET 9 release and few other hack projects that I want to get done for the .NET 10 timeframe. I hope to eventually look into it but it’s currently not a priority, sorry.

@am11
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am11 commented Sep 29, 2024

Ok, no worries, I'll also take a look when I get a chance. Was hoping to get some feedback from @viewizard et al. on register naming since it's not immediately clear to which convention is preferred at present day (and given llvm-libunwind has its own which is obviously different than HP-libunwind, coreclr VM and PAL). 😅

@sunlijun-610
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Here are some of my ideas, and I'm not sure if they're helpful.
I have also encountered the same problem when adding the LoongArch architecture, and I think the assertion failures should come from the incorrect offsets and sizes in src/coreclr/nativeaot/Runtime/riscv64/AsmOffsetsCpu.h. The offsets and sizes should be defined according to the actual definition of the structures.
Before rewriting src/coreclr/nativeaot/Runtime/riscv64/AsmOffsetsCpu.h, I think we should first determine the register names defined in the structures, for example, in src/coreclr/nativeaot/Runtime/regdisplay.h. Now the register names in regdisplay.h and AsmOffsetsCpu.h are still conflicting. And then determine the order of variables in the structures. After determining the definition of the structures, we can easily rewrite AsmOffsetsCpu.h all at once.

@am11
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am11 commented Sep 30, 2024

Thanks @sunlijun-610, https://github.com/am11/runtime/tree/feature/nativeaot/riscv64-port has the changes. Currently, the size of UnwindCursor<A, R> is 864 and unw_context_t is 768, so the does_fit assertion fails in llvm-libunwind UnwindCursor.hpp https://github.com/am11/runtime/blob/feature/nativeaot/riscv64-port/src/native/external/llvm-libunwind/src/UnwindCursor.hpp#L1349-L1357 (the existing assertions only tell us one operand's value not both sides that's why I added this template one to see the computed sizes at built time). If you have ideas how to satisfy AsmOffsetsCpu and UnwindCursor assertions simultaneously, feel free to push commits to the branch when you have time. I've sent you the colab invite. :)

@sunlijun-610
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Thanks! About the does_fit assertion failure in llvm-libunwind UnwindCursor.hpp, I think it's no need to add +32 in # define _LIBUNWIND_CURSOR_SIZE (_LIBUNWIND_CONTEXT_SIZE + 12) + 32, because _LIBUNWIND_CONTEXT_SIZE has been added. Then the size of unw_cursor_t is 864, same size as UnwindCursor<A, R>.
https://github.com/am11/runtime/blob/4cbeceef967c727605869d687a612d43315a13a1/src/native/external/llvm-libunwind/include/__libunwind_config.h#L158

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