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Assertion failed '!"Write to unaliased local overlaps outstanding read"' during 'Rationalize IR' #91855

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kunalspathak opened this issue Sep 10, 2023 · 4 comments · Fixed by #91882
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arch-arm64 area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI os-windows
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@kunalspathak
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// Found by Antigen

using System;
using System.Collections.Generic;
using System.Runtime.CompilerServices;
using System.Runtime.Intrinsics;
using System.Runtime.Intrinsics.Arm;
using System.Numerics;
public class TestClass
{
    public struct S1
    {
        public long long_1;
    }
    public struct S2
    {
        public bool bool_4;
    }
    static Vector64<byte> s_v64_byte_19 = Vector64.Create((byte)65);
    static Vector64<short> s_v64_short_21 = Vector64.CreateScalar((short)-2);
    static Vector64<uint> s_v64_uint_24 = Vector64.CreateScalar((uint)1);
    static Vector128<uint> s_v128_uint_34 = Vector128.Create((uint)1);
    static Vector128<double> s_v128_double_38 = Vector128.Create(1.0238095238095237);
    static S1 s_s1_42 = new S1();
    Vector64<byte> v64_byte_58 = Vector64.Create((byte)5);
    Vector64<short> v64_short_60 = Vector64.CreateScalar((short)1);
    Vector64<uint> v64_uint_63 = Vector64<uint>.AllBitsSet;
    Vector128<double> v128_double_77 = Vector128.CreateScalar(-1.945945945945946);
    S1 s1_81 = new S1();
    S2 s2_82 = new S2();
    static int s_loopInvariant = 3;
    public S1 Method4(out S2 p_s2_153, ref Vector64<byte> p_v64_byte_154, out Vector64<byte> p_v64_byte_155, ref Vector64<short> p_v64_short_156, S1 p_s1_157, out S1 p_s1_158, S2 p_s2_159, out bool p_bool_160)
    {
        unchecked
        {
            S1 s1_175 = new S1();
            p_s2_153 = s2_82;
            p_v64_byte_155 = Vector64.Equals(p_v64_byte_154 | p_v64_byte_154, v64_byte_58 | v64_byte_58) | (v64_byte_58 *= 15|4);
            p_s1_158 = s1_175;
            p_bool_160 = s2_82.bool_4 = Vector128.LessThanOrEqualAll(v128_double_77 + v128_double_77, Vector128<double>.Zero ^ s_v128_double_38);
            if (s1_175.long_1 < (s_s1_42.long_1 = 15%4))
            {
                if (Vector64.LessThanAll(s_v64_short_21 *= v64_short_60, v64_short_60 *= 15+4))
                {
                }
                else
                {
                    if (15>4)
                    {
                        s_v64_uint_24 = ((v64_uint_63 ^ (Vector64<uint>.AllBitsSet | s_v64_uint_24))& v64_uint_63)- (15-4)* Vector128.GetUpper(s_v128_uint_34);
                    }
                    else
                    {
                    }
                }
            }
            else
            {
            }
            try
            {
            }
            catch (System.NotImplementedException)
            {
            }
            finally
            {
                try
                {
                    ;
                    for (int __loopvar14 = 15-4;;)
                    {
                        if (__loopvar14 >= s_loopInvariant)
                            break;
                    }
                }
                catch (System.InvalidCastException)
                {
                }
            }
            return s1_175;
        }
    }
    public void Method0()
    {
        unchecked
        {
            S2 s2_203 = new S2();
            S2 s2_204 = s2_203;
            s1_81 = Method4(out s2_82, ref v64_byte_58, out s_v64_byte_19, ref v64_short_60, s_s1_42, out s_s1_42, s2_204, out s2_82.bool_4);
            return;
        }
    }
    public static void Main(string[] args)
    {
        new TestClass().Method0();
    }
}
/*
Got output diff:
--------- Baseline ---------  

Environment:



--------- Test ---------  

Environment:


[000262] -----------                            IL_OFFSET void   INLRT @ 0x0E6[E-]
read:  N001 (  1,  1) [000218] -----------                  t218 =    LCL_VAR   simd8  V34 cse5         u:1 <l:$4d7, c:$1cc>
       N002 (  1,  1) [000133] -----------                  t133 =    LCL_VAR   ref    V00 this         u:1 $80
       N003 (  1,  2) [000183] -----------                  t183 =    CNS_INT   long   24 Fseq[v64_uint_63] $187
                                                                   /--*  t133   ref    
                                                                   +--*  t183   long   
       N004 (  3,  4) [000184] -------N---                  t184 = *  ADD       byref  $304
                                                                   /--*  t184   byref  
       N005 (  4,  3) [000135] n---GO-----                  t135 = *  IND       simd8  <l:$4d9, c:$4d8>
                                                                   /--*  t135   simd8  
write: N006 (  4,  3) [000215] DA--GO-----                         *  STORE_LCL_VAR simd8  V34 cse5         d:1 $VN.Void
       N007 (  1,  1) [000216] -----------                  t216 =    LCL_VAR   simd8  V34 cse5         u:1 <l:$4d9, c:$4d8>
                                                                   /--*  t218   simd8  
                                                                   +--*  t216   simd8  
user:  N009 (  7,  6) [000251] ----GO-----                  t251 = *  HWINTRINSIC simd8  uint BitwiseClear
       N010 (  1,  1) [000234] -----------                  t234 =    LCL_VAR   long   V35 cse6         u:1 $343
       N011 (  1,  2) [000235] -----------                  t235 =    CNS_INT   long   -32
                                                                   /--*  t234   long   
                                                                   +--*  t235   long   
       N012 (  3,  4) [000236] -------N---                  t236 = *  ADD       long   $34d
                                                                   /--*  t236   long   
       N013 (  4,  3) [000147] n---G------                  t147 = *  IND       simd16 <l:$58b, c:$5c3>
                                                                   /--*  t147   simd16 
       N014 (  5,  4) [000148] ----G------                  t148 = *  HWINTRINSIC simd8  uint GetUpper <l:$4e0, c:$4e1>
       N015 (  3,  2) [000149] -----------                  t149 =    CNS_VEC   simd8 <0x0000000b, 0x0000000b> $106
                                                                   /--*  t148   simd8  
                                                                   +--*  t149   simd8  
       N016 (  9,  7) [000150] ----G------                  t150 = *  HWINTRINSIC simd8  uint MultiplyByScalar <l:$493, c:$494>
                                                                   /--*  t251   simd8  
                                                                   +--*  t150   simd8  
       N017 ( 17, 14) [000151] ----GO-----                  t151 = *  HWINTRINSIC simd8  uint Subtract <l:$4e3, c:$4e2>
       N018 (  1,  1) [000237] -----------                  t237 =    LCL_VAR   long   V35 cse6         u:1 $343
       N019 (  1,  2) [000238] -----------                  t238 =    CNS_INT   long   -56
                                                                   /--*  t237   long   
                                                                   +--*  t238   long   
       N020 (  3,  4) [000239] -------N---                  t239 = *  ADD       long   $34b
                                                                   /--*  t239   long   
                                                                   +--*  t151   simd8  
       N021 ( 22, 18) [000153] nA--GO-----                         *  STOREIND  simd8  (copy) $441
Assert failure(PID 19148 [0x00004acc], Thread: 14692 [0x3964]): Assertion failed '!"Write to unaliased local overlaps outstanding read"' in 'TestClass:Method4(byref,byref,byref,byref,TestClass+S1,byref,TestClass+S2,byref):TestClass+S1:this' during 'Rationalize IR' (IL size 319; hash 0x072ec4b5; Tier0-FullOpts)
    File: D:\git\runtime2\src\coreclr\jit\lir.cpp Line: 1487
    Image: e:\kpathak\CORE_ROOT\corerun.exe
*/
@kunalspathak kunalspathak added arch-arm64 os-windows area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI labels Sep 10, 2023
@ghost ghost added the untriaged New issue has not been triaged by the area owner label Sep 10, 2023
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ghost commented Sep 10, 2023

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

Issue Details
// Found by Antigen

using System;
using System.Collections.Generic;
using System.Runtime.CompilerServices;
using System.Runtime.Intrinsics;
using System.Runtime.Intrinsics.Arm;
using System.Numerics;
public class TestClass
{
    public struct S1
    {
        public long long_1;
    }
    public struct S2
    {
        public bool bool_4;
    }
    static Vector64<byte> s_v64_byte_19 = Vector64.Create((byte)65);
    static Vector64<short> s_v64_short_21 = Vector64.CreateScalar((short)-2);
    static Vector64<uint> s_v64_uint_24 = Vector64.CreateScalar((uint)1);
    static Vector128<uint> s_v128_uint_34 = Vector128.Create((uint)1);
    static Vector128<double> s_v128_double_38 = Vector128.Create(1.0238095238095237);
    static S1 s_s1_42 = new S1();
    Vector64<byte> v64_byte_58 = Vector64.Create((byte)5);
    Vector64<short> v64_short_60 = Vector64.CreateScalar((short)1);
    Vector64<uint> v64_uint_63 = Vector64<uint>.AllBitsSet;
    Vector128<double> v128_double_77 = Vector128.CreateScalar(-1.945945945945946);
    S1 s1_81 = new S1();
    S2 s2_82 = new S2();
    static int s_loopInvariant = 3;
    public S1 Method4(out S2 p_s2_153, ref Vector64<byte> p_v64_byte_154, out Vector64<byte> p_v64_byte_155, ref Vector64<short> p_v64_short_156, S1 p_s1_157, out S1 p_s1_158, S2 p_s2_159, out bool p_bool_160)
    {
        unchecked
        {
            S1 s1_175 = new S1();
            p_s2_153 = s2_82;
            p_v64_byte_155 = Vector64.Equals(p_v64_byte_154 | p_v64_byte_154, v64_byte_58 | v64_byte_58) | (v64_byte_58 *= 15|4);
            p_s1_158 = s1_175;
            p_bool_160 = s2_82.bool_4 = Vector128.LessThanOrEqualAll(v128_double_77 + v128_double_77, Vector128<double>.Zero ^ s_v128_double_38);
            if (s1_175.long_1 < (s_s1_42.long_1 = 15%4))
            {
                if (Vector64.LessThanAll(s_v64_short_21 *= v64_short_60, v64_short_60 *= 15+4))
                {
                }
                else
                {
                    if (15>4)
                    {
                        s_v64_uint_24 = ((v64_uint_63 ^ (Vector64<uint>.AllBitsSet | s_v64_uint_24))& v64_uint_63)- (15-4)* Vector128.GetUpper(s_v128_uint_34);
                    }
                    else
                    {
                    }
                }
            }
            else
            {
            }
            try
            {
            }
            catch (System.NotImplementedException)
            {
            }
            finally
            {
                try
                {
                    ;
                    for (int __loopvar14 = 15-4;;)
                    {
                        if (__loopvar14 >= s_loopInvariant)
                            break;
                    }
                }
                catch (System.InvalidCastException)
                {
                }
            }
            return s1_175;
        }
    }
    public void Method0()
    {
        unchecked
        {
            S2 s2_203 = new S2();
            S2 s2_204 = s2_203;
            s1_81 = Method4(out s2_82, ref v64_byte_58, out s_v64_byte_19, ref v64_short_60, s_s1_42, out s_s1_42, s2_204, out s2_82.bool_4);
            return;
        }
    }
    public static void Main(string[] args)
    {
        new TestClass().Method0();
    }
}
/*
Got output diff:
--------- Baseline ---------  

Environment:



--------- Test ---------  

Environment:


[000262] -----------                            IL_OFFSET void   INLRT @ 0x0E6[E-]
read:  N001 (  1,  1) [000218] -----------                  t218 =    LCL_VAR   simd8  V34 cse5         u:1 <l:$4d7, c:$1cc>
       N002 (  1,  1) [000133] -----------                  t133 =    LCL_VAR   ref    V00 this         u:1 $80
       N003 (  1,  2) [000183] -----------                  t183 =    CNS_INT   long   24 Fseq[v64_uint_63] $187
                                                                   /--*  t133   ref    
                                                                   +--*  t183   long   
       N004 (  3,  4) [000184] -------N---                  t184 = *  ADD       byref  $304
                                                                   /--*  t184   byref  
       N005 (  4,  3) [000135] n---GO-----                  t135 = *  IND       simd8  <l:$4d9, c:$4d8>
                                                                   /--*  t135   simd8  
write: N006 (  4,  3) [000215] DA--GO-----                         *  STORE_LCL_VAR simd8  V34 cse5         d:1 $VN.Void
       N007 (  1,  1) [000216] -----------                  t216 =    LCL_VAR   simd8  V34 cse5         u:1 <l:$4d9, c:$4d8>
                                                                   /--*  t218   simd8  
                                                                   +--*  t216   simd8  
user:  N009 (  7,  6) [000251] ----GO-----                  t251 = *  HWINTRINSIC simd8  uint BitwiseClear
       N010 (  1,  1) [000234] -----------                  t234 =    LCL_VAR   long   V35 cse6         u:1 $343
       N011 (  1,  2) [000235] -----------                  t235 =    CNS_INT   long   -32
                                                                   /--*  t234   long   
                                                                   +--*  t235   long   
       N012 (  3,  4) [000236] -------N---                  t236 = *  ADD       long   $34d
                                                                   /--*  t236   long   
       N013 (  4,  3) [000147] n---G------                  t147 = *  IND       simd16 <l:$58b, c:$5c3>
                                                                   /--*  t147   simd16 
       N014 (  5,  4) [000148] ----G------                  t148 = *  HWINTRINSIC simd8  uint GetUpper <l:$4e0, c:$4e1>
       N015 (  3,  2) [000149] -----------                  t149 =    CNS_VEC   simd8 <0x0000000b, 0x0000000b> $106
                                                                   /--*  t148   simd8  
                                                                   +--*  t149   simd8  
       N016 (  9,  7) [000150] ----G------                  t150 = *  HWINTRINSIC simd8  uint MultiplyByScalar <l:$493, c:$494>
                                                                   /--*  t251   simd8  
                                                                   +--*  t150   simd8  
       N017 ( 17, 14) [000151] ----GO-----                  t151 = *  HWINTRINSIC simd8  uint Subtract <l:$4e3, c:$4e2>
       N018 (  1,  1) [000237] -----------                  t237 =    LCL_VAR   long   V35 cse6         u:1 $343
       N019 (  1,  2) [000238] -----------                  t238 =    CNS_INT   long   -56
                                                                   /--*  t237   long   
                                                                   +--*  t238   long   
       N020 (  3,  4) [000239] -------N---                  t239 = *  ADD       long   $34b
                                                                   /--*  t239   long   
                                                                   +--*  t151   simd8  
       N021 ( 22, 18) [000153] nA--GO-----                         *  STOREIND  simd8  (copy) $441
Assert failure(PID 19148 [0x00004acc], Thread: 14692 [0x3964]): Assertion failed '!"Write to unaliased local overlaps outstanding read"' in 'TestClass:Method4(byref,byref,byref,byref,TestClass+S1,byref,TestClass+S2,byref):TestClass+S1:this' during 'Rationalize IR' (IL size 319; hash 0x072ec4b5; Tier0-FullOpts)
    File: D:\git\runtime2\src\coreclr\jit\lir.cpp Line: 1487
    Image: e:\kpathak\CORE_ROOT\corerun.exe
*/
Author: kunalspathak
Assignees: -
Labels:

arch-arm64, os-windows, area-CodeGen-coreclr

Milestone: -

@kunalspathak kunalspathak added this to the 8.0.0 milestone Sep 11, 2023
@ghost ghost removed the untriaged New issue has not been triaged by the area owner label Sep 11, 2023
@kunalspathak
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@jakobbotsch PTAL.

@jakobbotsch
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jakobbotsch commented Sep 11, 2023

gtNewSimdBinOpNode can swap operands in the GT_AND_NOT case and apparently expects the caller to have spilled beforehand, which is not something the callers actually do. In this case it ends up swapping an op1, op2 where op1 has an embedded store and op2 is a use of the stored local.

It's very surprising that gtNewSimdBinOpNode has this kind of complicated logic embedded in it when it just looks like an ordinary IR node constructor.

@jakobbotsch
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Hmm, this actually looks like a regression from #81993 -- in this case the swapping that happens is because that logic swaps lhs and rhs without any further checks.

@jakobbotsch jakobbotsch modified the milestones: 8.0.0, 9.0.0 Sep 11, 2023
jakobbotsch added a commit to jakobbotsch/runtime that referenced this issue Sep 11, 2023
The new logic introduced in dotnet#81993 would swap the LHS and RHS of the
operands without any additional checks for side effects.

Fix dotnet#91855
@ghost ghost added the in-pr There is an active PR which will close this issue when it is merged label Sep 11, 2023
jakobbotsch added a commit that referenced this issue Sep 11, 2023
…91882)

The new logic introduced in #81993 would swap the LHS and RHS of the
operands without any additional checks for side effects.

Fix #91855
@ghost ghost removed the in-pr There is an active PR which will close this issue when it is merged label Sep 11, 2023
@ghost ghost locked as resolved and limited conversation to collaborators Oct 12, 2023
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