JIT ARM64-SVE: Add Count*BitElements #101188

a74nh · 2024-04-17T15:54:51Z

Moves HW_Category_EnumPattern to a flag, as these APIs need both EnumPattern and HW_Category_Scalar.

Test results:

❯ $CORE_ROOT/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_Count
12:43:02.239 Running test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count16BitElements()
Supported ISAs:
  AdvSimd:   True
  Aes:       True
  ArmBase:   True
  Crc32:     True
  Dp:        True
  Rdm:       True
  Sha1:      True
  Sha256:    True
  Sve:       True

Beginning scenario: RunBasicScenario_UnsafeRead
Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
12:43:02.340 Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count16BitElements()
12:43:02.347 Running test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count32BitElements()
Beginning scenario: RunBasicScenario_UnsafeRead
Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
12:43:02.354 Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count32BitElements()
12:43:02.356 Running test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count64BitElements()
Beginning scenario: RunBasicScenario_UnsafeRead
Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
12:43:02.363 Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count64BitElements()
12:43:02.365 Running test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count8BitElements()
Beginning scenario: RunBasicScenario_UnsafeRead
Beginning scenario: RunReflectionScenario_UnsafeRead
Beginning scenario: RunLclVarScenario_UnsafeRead
Beginning scenario: RunClassFldScenario
Beginning scenario: RunStructLclFldScenario
Beginning scenario: RunStructFldScenario
12:43:02.372 Passed test: _Sve_ro::JIT.HardwareIntrinsics.Arm._Sve.Program.Sve_Count8BitElements()

dotnet-issue-labeler · 2024-04-17T15:54:56Z

Note regarding the new-api-needs-documentation label:

This serves as a reminder for when your PR is modifying a ref *.cs file and adding/modifying public APIs, please make sure the API implementation in the src *.cs file is documented with triple slash comments, so the PR reviewers can sign off that change.

dotnet-policy-service · 2024-04-17T15:55:19Z

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

a74nh · 2024-04-17T16:08:09Z

@kunalspathak @dotnet/arm64-contrib

kunalspathak

Added some questions.

src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs

src/coreclr/jit/hwintrinsiccodegenarm64.cpp

src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs

kunalspathak · 2024-04-23T14:23:36Z

src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs

@@ -2887,6 +2887,10 @@

 (string templateFileName, Dictionary<string, string> templateData)[] SveInputs = new []
 {
+    ("ScalarUnOpTest.template",           new Dictionary<string, string> { ["TestName"] = "Sve_Count16BitElements",                                                                                ["Isa"] = "Sve",           ["LoadIsa"] = "Sve",     ["Method"] = "Count16BitElements",                                                                                    ["RetBaseType"] = "UInt64",                                   ["Op1BaseType"] = "SveMaskPattern",                                                                                                                   ["LargestVectorSize"] = "8",  ["NextValueOp1"] = "SveMaskPattern.All",                                                                                                                                                                     ["ValidateResult"] = "isUnexpectedResult = (result != (UInt64)(Unsafe.SizeOf<Vector<Int16>>() / sizeof(Int16)));",}),


From #100606 (comment), LargestVectorSize should be 256. You can fix it in a follow-up PR.

kunalspathak

LGTM

…sses. TEST_LABEL: ent-arch-aarch64 TEST_IMG: ubuntu/dotnet-build TEST_CMD: safe ./projects/dotnet/test-runtime.sh --scope coreclr,libs Jira: ENTLLT-7328 Change-Id: I727edf8652a5c8648e7008d4ca47e7a4f36d5a1e

tannergooding · 2024-04-23T15:57:30Z

src/coreclr/jit/hwintrinsic.h

+    // The intrinsic has an enum operand. Using this implies HW_Flag_HasImmediateOperand.
+    HW_Flag_HasEnumOperand = 0x80000,


It's not clear to me why we need this in addition to HasImmediateOperand?

It's not clear to me why we need this in addition to HasImmediateOperand?

This is just for the hwintrinsiccodegen - so that it can pick the correct emitIns_ function to call (namely emitIns_R_PATTERN).

Although, given an immediate and enum are effectively the same, I wonder if we should eventually do some refactoring so that it goes via emitIns_R_I() using an int and then remove emitIns_R_PATTERN().

a74nh · 2024-04-25T15:57:59Z

Stress test results:

❯ ~/dotnet/sve_api_runtime/stress_tester.py $CORE_ROOT/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_Count
===================Running default===================
{}
===================Running jitstress===================
{'JitMinOpts': '1'}
{'JitStress': '1'}
{'JitStress': '2'}
{'JitStress': '1', 'TieredCompilation': '1'}
{'JitStress': '2', 'TieredCompilation': '1'}
{'TailcallStress': '1'}
{'ReadyToRun': '0'}
===================Running jitstressregs===================
{'JitStressRegs': '1'}
{'JitStressRegs': '2'}
{'JitStressRegs': '3'}
{'JitStressRegs': '4'}
{'JitStressRegs': '8'}
{'JitStressRegs': '0x10'}
{'JitStressRegs': '0x80'}
{'JitStressRegs': '0x1000'}
{'JitStressRegs': '0x2000'}
===================Running jitstress2-jitstressregs===================
{'JitStress': '2', 'JitStressRegs': '1'}
{'JitStress': '2', 'JitStressRegs': '2'}
{'JitStress': '2', 'JitStressRegs': '3'}
{'JitStress': '2', 'JitStressRegs': '4'}
{'JitStress': '2', 'JitStressRegs': '8'}
{'JitStress': '2', 'JitStressRegs': '0x10'}
{'JitStress': '2', 'JitStressRegs': '0x80'}
{'JitStress': '2', 'JitStressRegs': '0x1000'}
{'JitStress': '2', 'JitStressRegs': '0x2000'}

JulieLeeMSFT · 2024-04-25T16:33:06Z

Stress test results:

❯ ~/dotnet/sve_api_runtime/stress_tester.py $CORE_ROOT/corerun ./artifacts/tests/coreclr/linux.arm64.Checked/JIT/HardwareIntrinsics/HardwareIntrinsics_Arm_ro/HardwareIntrinsics_Arm_ro.dll Sve_Count
===================Running default===================
{}
===================Running jitstress===================
{'JitMinOpts': '1'}
{'JitStress': '1'}
{'JitStress': '2'}
{'JitStress': '1', 'TieredCompilation': '1'}
{'JitStress': '2', 'TieredCompilation': '1'}
{'TailcallStress': '1'}
{'ReadyToRun': '0'}
===================Running jitstressregs===================
{'JitStressRegs': '1'}
{'JitStressRegs': '2'}
{'JitStressRegs': '3'}
{'JitStressRegs': '4'}
{'JitStressRegs': '8'}
{'JitStressRegs': '0x10'}
{'JitStressRegs': '0x80'}
{'JitStressRegs': '0x1000'}
{'JitStressRegs': '0x2000'}
===================Running jitstress2-jitstressregs===================
{'JitStress': '2', 'JitStressRegs': '1'}
{'JitStress': '2', 'JitStressRegs': '2'}
{'JitStress': '2', 'JitStressRegs': '3'}
{'JitStress': '2', 'JitStressRegs': '4'}
{'JitStress': '2', 'JitStressRegs': '8'}
{'JitStress': '2', 'JitStressRegs': '0x10'}
{'JitStress': '2', 'JitStressRegs': '0x80'}
{'JitStress': '2', 'JitStressRegs': '0x1000'}
{'JitStress': '2', 'JitStressRegs': '0x2000'}

@a74nh, what does this output mean like 0, 1, 2,...?

kunalspathak · 2024-04-25T17:26:19Z

@a74nh, what does this output mean like 0, 1, 2,...?

@JulieLeeMSFT - those are the environment variables value we are setting before executing all the test cases. This is to future proof ourselves until we make SVE machines in CI operational and run the stress legs.

kunalspathak · 2024-04-25T17:27:12Z

@a74nh - you want to revert 2937557 before merging?

…en processes." This reverts commit 2937557.

a74nh · 2024-04-25T17:35:20Z

@a74nh - you want to revert 2937557 before merging?

Done

src/coreclr/inc/clrconfigvalues.h

kunalspathak

LGTM

* JIT ARM64-SVE: Add Count*BitElements * Generic ValidateResult testing * Fix formatting * Add option to change SVE vector length for current and children processes. TEST_LABEL: ent-arch-aarch64 TEST_IMG: ubuntu/dotnet-build TEST_CMD: safe ./projects/dotnet/test-runtime.sh --scope coreclr,libs Jira: ENTLLT-7328 Change-Id: I727edf8652a5c8648e7008d4ca47e7a4f36d5a1e * Revert "Add option to change SVE vector length for current and children processes." This reverts commit 2937557. * fix CreateTrueMask --------- Co-authored-by: Swapnil Gaikwad <swapnil.gaikwad@arm.com>

JIT ARM64-SVE: Add Count*BitElements

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dotnet-issue-labeler bot added area-CodeGen-coreclr CLR JIT compiler in src/coreclr/src/jit and related components such as SuperPMI new-api-needs-documentation labels Apr 17, 2024

dotnet-policy-service bot added the community-contribution Indicates that the PR has been added by a community member label Apr 17, 2024

a74nh marked this pull request as ready for review April 17, 2024 16:07

kunalspathak self-requested a review April 21, 2024 17:59

kunalspathak added the arm-sve Work related to arm64 SVE/SVE2 support label Apr 21, 2024

kunalspathak reviewed Apr 22, 2024

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src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs Show resolved Hide resolved

src/coreclr/jit/hwintrinsiccodegenarm64.cpp Show resolved Hide resolved

src/tests/Common/GenerateHWIntrinsicTests/GenerateHWIntrinsicTests_Arm.cs Outdated Show resolved Hide resolved

Generic ValidateResult testing

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This was referenced Apr 22, 2024

[wasm] System.Text.Json.Tests running out of memory #98578

Closed

The unzip unified artifacts task fails to open the zip archive with 7-zip dotnet/dnceng#2378

Open

Fix formatting

901c200

kunalspathak reviewed Apr 23, 2024

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Arm64: Implement SVE APIs #99957

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[Test Failure] SocketsHttpHandler_HttpClientHandler_AltSvc_Test_Http3.AltSvc_ConnectionFrame_UpgradeFrom20_Success #101376

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[Test Failure] SocketsHttpHandlerTest_Cookies_Http3.GetAsync_SetCookieContainerAndCookieHeader_BothCookiesSent #101377

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Add option to change SVE vector length for current and children proce…

2937557

…sses. TEST_LABEL: ent-arch-aarch64 TEST_IMG: ubuntu/dotnet-build TEST_CMD: safe ./projects/dotnet/test-runtime.sh --scope coreclr,libs Jira: ENTLLT-7328 Change-Id: I727edf8652a5c8648e7008d4ca47e7a4f36d5a1e

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System.Text.Json.Tests timeout in Linux-Debug-x64-Mono_Interpreter_Debug-Ubuntu.2204.Amd64.Open #101508

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Long Running Test: System.Text.Json.Tests.Utf8JsonWriterTests.WriteNumbers #101522

Closed

Merge main

3dbad56

kunalspathak self-requested a review April 25, 2024 17:27

Revert "Add option to change SVE vector length for current and childr…

7ffe49b

…en processes." This reverts commit 2937557.

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a74nh added 3 commits April 26, 2024 10:09

Merge main

18d80bf

fix CreateTrueMask

3e82dd8

Merge main

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[browser][MT] WasmBrowserTestRunner.RunConsoleMessagesPump - abrupt disconect #101618

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JIT ARM64-SVE: Add Count*BitElements #101188

JIT ARM64-SVE: Add Count*BitElements #101188

a74nh commented Apr 17, 2024

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		// The intrinsic has an enum operand. Using this implies HW_Flag_HasImmediateOperand.
		HW_Flag_HasEnumOperand = 0x80000,

JIT ARM64-SVE: Add Count*BitElements #101188

JIT ARM64-SVE: Add Count*BitElements #101188

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