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ARM64-SVE: Add ConvertToSingle, ConvertToDouble; fix CovertTo* tests #104478

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merged 4 commits into from
Jul 16, 2024
Merged

ARM64-SVE: Add ConvertToSingle, ConvertToDouble; fix CovertTo* tests #104478

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9fbc96c
Everything working except ConvertToSingle CndSel
amanasifkhalid Jul 5, 2024
92d7f2c
Merge from main
amanasifkhalid Jul 5, 2024
87a56a6
Merge from main
amanasifkhalid Jul 15, 2024
956f37c
Skip CndSel tests for different in/out sizes
amanasifkhalid Jul 16, 2024
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4 changes: 3 additions & 1 deletion src/coreclr/jit/hwintrinsic.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2088,9 +2088,11 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
#elif defined(TARGET_ARM64)
switch (intrinsic)
{
case NI_Sve_ConvertToDouble:
case NI_Sve_ConvertToInt32:
case NI_Sve_ConvertToUInt32:
case NI_Sve_ConvertToInt64:
case NI_Sve_ConvertToSingle:
case NI_Sve_ConvertToUInt32:
case NI_Sve_ConvertToUInt64:
// Save the base type of return SIMD. It is used to contain this intrinsic inside
// ConditionalSelect.
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2 changes: 2 additions & 0 deletions src/coreclr/jit/hwintrinsiccodegenarm64.cpp
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Expand Up @@ -516,6 +516,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)
{
case NI_Sve_ConvertToInt32:
case NI_Sve_ConvertToUInt32:
case NI_Sve_ConvertToSingle:
{
embOpt = emitTypeSize(intrinEmbMask.baseType) == EA_8BYTE ? INS_OPTS_D_TO_S
: INS_OPTS_SCALABLE_S;
Expand All @@ -524,6 +525,7 @@ void CodeGen::genHWIntrinsic(GenTreeHWIntrinsic* node)

case NI_Sve_ConvertToInt64:
case NI_Sve_ConvertToUInt64:
case NI_Sve_ConvertToDouble:
{
embOpt = emitTypeSize(intrinEmbMask.baseType) == EA_4BYTE ? INS_OPTS_S_TO_D
: INS_OPTS_SCALABLE_D;
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2 changes: 2 additions & 0 deletions src/coreclr/jit/hwintrinsiclistarm64sve.h
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Expand Up @@ -47,8 +47,10 @@ HARDWARE_INTRINSIC(Sve, ConditionalExtractAfterLastActiveElementAndRep
HARDWARE_INTRINSIC(Sve, ConditionalExtractLastActiveElement, -1, 3, true, {INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_HasRMWSemantics|HW_Flag_HasScalarInputVariant|HW_Flag_SpecialCodeGen)
HARDWARE_INTRINSIC(Sve, ConditionalExtractLastActiveElementAndReplicate, -1, 3, true, {INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb, INS_sve_clastb}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_LowMaskedOperation|HW_Flag_HasRMWSemantics)
HARDWARE_INTRINSIC(Sve, ConditionalSelect, -1, 3, true, {INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel, INS_sve_sel}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_ExplicitMaskedOperation|HW_Flag_SupportsContainment)
HARDWARE_INTRINSIC(Sve, ConvertToDouble, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_scvtf, INS_sve_ucvtf, INS_sve_scvtf, INS_sve_ucvtf, INS_sve_fcvt, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToInt64, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzs, INS_sve_fcvtzs}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToSingle, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_scvtf, INS_sve_ucvtf, INS_sve_scvtf, INS_sve_ucvtf, INS_invalid, INS_sve_fcvt}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToUInt32, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, ConvertToUInt64, -1, -1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_fcvtzu, INS_sve_fcvtzu}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_BaseTypeFromFirstArg|HW_Flag_EmbeddedMaskedOperation|HW_Flag_LowMaskedOperation)
HARDWARE_INTRINSIC(Sve, Count16BitElements, 0, 1, false, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_cnth, INS_invalid, INS_invalid, INS_invalid}, HW_Category_Scalar, HW_Flag_Scalable|HW_Flag_HasEnumOperand|HW_Flag_SpecialCodeGen|HW_Flag_NoFloatingPointUsed)
Expand Down
6 changes: 4 additions & 2 deletions src/coreclr/jit/lowerarmarch.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -3598,9 +3598,11 @@ void Lowering::ContainCheckHWIntrinsic(GenTreeHWIntrinsic* node)

// For now, make sure that we get here only for intrinsics that we are
// sure about to rely on auxiliary type's size.
assert((embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt32) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt32) ||
assert((embOp->GetHWIntrinsicId() == NI_Sve_ConvertToDouble) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt32) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToInt64) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToSingle) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt32) ||
(embOp->GetHWIntrinsicId() == NI_Sve_ConvertToUInt64));

uint32_t auxSize = genTypeSize(embOp->GetAuxiliaryType());
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97 changes: 97 additions & 0 deletions ...ries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.PlatformNotSupported.cs
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Expand Up @@ -1859,6 +1859,54 @@ internal Arm64() { }
public static unsafe Vector<double> ConditionalSelect(Vector<double> mask, Vector<double> left, Vector<double> right) { throw new PlatformNotSupportedException(); }


/// ConvertToDouble : Floating-point convert

/// <summary>
/// svfloat64_t svcvt_f64[_s32]_m(svfloat64_t inactive, svbool_t pg, svint32_t op)
/// SCVTF Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_s32]_x(svbool_t pg, svint32_t op)
/// SCVTF Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_s32]_z(svbool_t pg, svint32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<int> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat64_t svcvt_f64[_s64]_m(svfloat64_t inactive, svbool_t pg, svint64_t op)
/// SCVTF Ztied.D, Pg/M, Zop.D
/// svfloat64_t svcvt_f64[_s64]_x(svbool_t pg, svint64_t op)
/// SCVTF Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svcvt_f64[_s64]_z(svbool_t pg, svint64_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<long> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat64_t svcvt_f64[_f32]_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op)
/// FCVT Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVT Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<float> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat64_t svcvt_f64[_u32]_m(svfloat64_t inactive, svbool_t pg, svuint32_t op)
/// UCVTF Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_u32]_x(svbool_t pg, svuint32_t op)
/// UCVTF Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_u32]_z(svbool_t pg, svuint32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<uint> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat64_t svcvt_f64[_u64]_m(svfloat64_t inactive, svbool_t pg, svuint64_t op)
/// UCVTF Ztied.D, Pg/M, Zop.D
/// svfloat64_t svcvt_f64[_u64]_x(svbool_t pg, svuint64_t op)
/// UCVTF Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svcvt_f64[_u64]_z(svbool_t pg, svuint64_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<ulong> value) { throw new PlatformNotSupportedException(); }


/// ConvertToInt32 : Floating-point convert

/// <summary>
Expand Down Expand Up @@ -1900,6 +1948,55 @@ internal Arm64() { }
/// </summary>
public static unsafe Vector<long> ConvertToInt64(Vector<float> value) { throw new PlatformNotSupportedException(); }


/// ConvertToSingle : Floating-point convert

/// <summary>
/// svfloat32_t svcvt_f32[_f64]_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVT Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVT Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<double> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svcvt_f32[_s32]_m(svfloat32_t inactive, svbool_t pg, svint32_t op)
/// SCVTF Ztied.S, Pg/M, Zop.S
/// svfloat32_t svcvt_f32[_s32]_x(svbool_t pg, svint32_t op)
/// SCVTF Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svcvt_f32[_s32]_z(svbool_t pg, svint32_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<int> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svcvt_f32[_s64]_m(svfloat32_t inactive, svbool_t pg, svint64_t op)
/// SCVTF Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_s64]_x(svbool_t pg, svint64_t op)
/// SCVTF Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_s64]_z(svbool_t pg, svint64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<long> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svcvt_f32[_u32]_m(svfloat32_t inactive, svbool_t pg, svuint32_t op)
/// UCVTF Ztied.S, Pg/M, Zop.S
/// svfloat32_t svcvt_f32[_u32]_x(svbool_t pg, svuint32_t op)
/// UCVTF Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svcvt_f32[_u32]_z(svbool_t pg, svuint32_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<uint> value) { throw new PlatformNotSupportedException(); }

/// <summary>
/// svfloat32_t svcvt_f32[_u64]_m(svfloat32_t inactive, svbool_t pg, svuint64_t op)
/// UCVTF Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_u64]_x(svbool_t pg, svuint64_t op)
/// UCVTF Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_u64]_z(svbool_t pg, svuint64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<ulong> value) { throw new PlatformNotSupportedException(); }


/// ConvertToUInt32 : Floating-point convert

/// <summary>
Expand Down
96 changes: 96 additions & 0 deletions src/libraries/System.Private.CoreLib/src/System/Runtime/Intrinsics/Arm/Sve.cs
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Expand Up @@ -1917,6 +1917,54 @@ internal Arm64() { }
public static unsafe Vector<double> ConditionalSelect(Vector<double> mask, Vector<double> left, Vector<double> right) => ConditionalSelect(mask, left, right);


/// ConvertToDouble : Floating-point convert

/// <summary>
/// svfloat64_t svcvt_f64[_s32]_m(svfloat64_t inactive, svbool_t pg, svint32_t op)
/// SCVTF Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_s32]_x(svbool_t pg, svint32_t op)
/// SCVTF Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_s32]_z(svbool_t pg, svint32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<int> value) => ConvertToDouble(value);

/// <summary>
/// svfloat64_t svcvt_f64[_s64]_m(svfloat64_t inactive, svbool_t pg, svint64_t op)
/// SCVTF Ztied.D, Pg/M, Zop.D
/// svfloat64_t svcvt_f64[_s64]_x(svbool_t pg, svint64_t op)
/// SCVTF Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svcvt_f64[_s64]_z(svbool_t pg, svint64_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<long> value) => ConvertToDouble(value);

/// <summary>
/// svfloat64_t svcvt_f64[_f32]_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op)
/// FCVT Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_f32]_x(svbool_t pg, svfloat32_t op)
/// FCVT Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_f32]_z(svbool_t pg, svfloat32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<float> value) => ConvertToDouble(value);

/// <summary>
/// svfloat64_t svcvt_f64[_u32]_m(svfloat64_t inactive, svbool_t pg, svuint32_t op)
/// UCVTF Ztied.D, Pg/M, Zop.S
/// svfloat64_t svcvt_f64[_u32]_x(svbool_t pg, svuint32_t op)
/// UCVTF Ztied.D, Pg/M, Ztied.S
/// svfloat64_t svcvt_f64[_u32]_z(svbool_t pg, svuint32_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<uint> value) => ConvertToDouble(value);

/// <summary>
/// svfloat64_t svcvt_f64[_u64]_m(svfloat64_t inactive, svbool_t pg, svuint64_t op)
/// UCVTF Ztied.D, Pg/M, Zop.D
/// svfloat64_t svcvt_f64[_u64]_x(svbool_t pg, svuint64_t op)
/// UCVTF Ztied.D, Pg/M, Ztied.D
/// svfloat64_t svcvt_f64[_u64]_z(svbool_t pg, svuint64_t op)
/// </summary>
public static unsafe Vector<double> ConvertToDouble(Vector<ulong> value) => ConvertToDouble(value);


/// ConvertToInt32 : Floating-point convert

/// <summary>
Expand Down Expand Up @@ -1959,6 +2007,54 @@ internal Arm64() { }
public static unsafe Vector<long> ConvertToInt64(Vector<float> value) => ConvertToInt64(value);


/// ConvertToSingle : Floating-point convert

/// <summary>
/// svfloat32_t svcvt_f32[_f64]_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op)
/// FCVT Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_f64]_x(svbool_t pg, svfloat64_t op)
/// FCVT Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_f64]_z(svbool_t pg, svfloat64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<double> value) => ConvertToSingle(value);

/// <summary>
/// svfloat32_t svcvt_f32[_s32]_m(svfloat32_t inactive, svbool_t pg, svint32_t op)
/// SCVTF Ztied.S, Pg/M, Zop.S
/// svfloat32_t svcvt_f32[_s32]_x(svbool_t pg, svint32_t op)
/// SCVTF Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svcvt_f32[_s32]_z(svbool_t pg, svint32_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<int> value) => ConvertToSingle(value);

/// <summary>
/// svfloat32_t svcvt_f32[_s64]_m(svfloat32_t inactive, svbool_t pg, svint64_t op)
/// SCVTF Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_s64]_x(svbool_t pg, svint64_t op)
/// SCVTF Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_s64]_z(svbool_t pg, svint64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<long> value) => ConvertToSingle(value);

/// <summary>
/// svfloat32_t svcvt_f32[_u32]_m(svfloat32_t inactive, svbool_t pg, svuint32_t op)
/// UCVTF Ztied.S, Pg/M, Zop.S
/// svfloat32_t svcvt_f32[_u32]_x(svbool_t pg, svuint32_t op)
/// UCVTF Ztied.S, Pg/M, Ztied.S
/// svfloat32_t svcvt_f32[_u32]_z(svbool_t pg, svuint32_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<uint> value) => ConvertToSingle(value);

/// <summary>
/// svfloat32_t svcvt_f32[_u64]_m(svfloat32_t inactive, svbool_t pg, svuint64_t op)
/// UCVTF Ztied.S, Pg/M, Zop.D
/// svfloat32_t svcvt_f32[_u64]_x(svbool_t pg, svuint64_t op)
/// UCVTF Ztied.S, Pg/M, Ztied.D
/// svfloat32_t svcvt_f32[_u64]_z(svbool_t pg, svuint64_t op)
/// </summary>
public static unsafe Vector<float> ConvertToSingle(Vector<ulong> value) => ConvertToSingle(value);


/// ConvertToUInt32 : Floating-point convert

/// <summary>
Expand Down
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