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ARM64-SVE: Always convert to mask for mask APIs #106690

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merged 3 commits into from
Aug 22, 2024
Merged

ARM64-SVE: Always convert to mask for mask APIs #106690

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e3867d1
ARM64-SVE: Always convert to mask for mask APIs
a74nh Aug 20, 2024
8cf6d25
Remove convertToMask
a74nh Aug 20, 2024
88fc306
fix formatting
a74nh Aug 20, 2024
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22 changes: 10 additions & 12 deletions src/coreclr/jit/hwintrinsic.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2261,13 +2261,6 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
}

#if defined(FEATURE_MASKED_HW_INTRINSICS) && defined(TARGET_ARM64)
auto convertToMaskIfNeeded = [&](GenTree*& op) {
if (!varTypeIsMask(op))
{
op = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op, simdBaseJitType, simdSize);
}
};

if (HWIntrinsicInfo::IsExplicitMaskedOperation(intrinsic))
{
assert(numArgs > 0);
Expand All @@ -2278,7 +2271,8 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
case NI_Sve_CreateBreakBeforePropagateMask:
{
// HWInstrinsic requires a mask for op3
convertToMaskIfNeeded(retNode->AsHWIntrinsic()->Op(3));
GenTree*& op = retNode->AsHWIntrinsic()->Op(3);
op = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op, simdBaseJitType, simdSize);
FALLTHROUGH;
}
case NI_Sve_CreateBreakAfterMask:
Expand All @@ -2291,13 +2285,15 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
case NI_Sve_TestLastTrue:
{
// HWInstrinsic requires a mask for op2
convertToMaskIfNeeded(retNode->AsHWIntrinsic()->Op(2));
GenTree*& op = retNode->AsHWIntrinsic()->Op(2);
op = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op, simdBaseJitType, simdSize);
FALLTHROUGH;
}
default:
{
// HWInstrinsic requires a mask for op1
convertToMaskIfNeeded(retNode->AsHWIntrinsic()->Op(1));
GenTree*& op = retNode->AsHWIntrinsic()->Op(1);
op = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op, simdBaseJitType, simdSize);
break;
}
}
Expand All @@ -2317,8 +2313,10 @@ GenTree* Compiler::impHWIntrinsic(NamedIntrinsic intrinsic,
{
case NI_Sve_CreateBreakPropagateMask:
{
convertToMaskIfNeeded(retNode->AsHWIntrinsic()->Op(1));
convertToMaskIfNeeded(retNode->AsHWIntrinsic()->Op(2));
GenTree*& op1 = retNode->AsHWIntrinsic()->Op(1);
GenTree*& op2 = retNode->AsHWIntrinsic()->Op(2);
op1 = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op1, simdBaseJitType, simdSize);
op2 = gtNewSimdCvtVectorToMaskNode(TYP_MASK, op2, simdBaseJitType, simdSize);
break;
}

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