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Arm: Free up upper-half register that was not ready because of its association with busy lower-half register #107714

Merged
merged 12 commits into from
Sep 14, 2024
Merged

Arm: Free up upper-half register that was not ready because of its association with busy lower-half register #107714

merged 12 commits into from
Sep 14, 2024

Commits on Sep 11, 2024

  1. make sure the upperHalf is moved to ready pool when lowerHalf holding… 

    … DOUBLE interval is done
    @kunalspathak
    kunalspathak committed Sep 11, 2024
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  2. remove the logging

    @kunalspathak
    kunalspathak committed Sep 11, 2024
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  3. added test cases

    @kunalspathak
    kunalspathak committed Sep 11, 2024
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  4. fix a typo

    @kunalspathak
    kunalspathak committed Sep 11, 2024
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  5. Add missing Xunit reference

    @kunalspathak
    kunalspathak committed Sep 11, 2024
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Commits on Sep 12, 2024

  1. Revert "remove the logging" 

    This reverts commit d8f2f17.
    @kunalspathak
    kunalspathak committed Sep 12, 2024
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  2. better fix to free up upperHalf if lowerHalf is getting freed up

    @kunalspathak
    kunalspathak committed Sep 12, 2024
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  3. jit format

    @kunalspathak
    kunalspathak committed Sep 12, 2024
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Commits on Sep 13, 2024

  1. Revert "remove the logging" 

    This reverts commit d8f2f17.
    @kunalspathak
    kunalspathak committed Sep 13, 2024
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  2. Handle upperHalf fix similar to lowerHalf code

    @kunalspathak
    kunalspathak committed Sep 13, 2024
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  3. formatting

    @kunalspathak
    kunalspathak committed Sep 13, 2024
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  4. jit format

    @kunalspathak
    kunalspathak committed Sep 13, 2024
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