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ARM64-SVE: Allow LCLs to be of type MASK #109286

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Nov 18, 2024
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5420c7f
ARM64-SVE: Allow LCLs to be of type MASK
a74nh Oct 28, 2024
8020826
Trigger based on OptimizationDisabled
a74nh Oct 29, 2024
44148b9
Add compConvertMaskToVectorUsed check
a74nh Oct 29, 2024
9800906
Initial version with hashtable
a74nh Oct 30, 2024
96d8590
Use double weighting method
a74nh Nov 1, 2024
9436497
Move to lclmorph
a74nh Nov 4, 2024
7d21d6c
Better commenting
a74nh Nov 4, 2024
5662322
Add TARGET_ARM64 check
a74nh Nov 4, 2024
a8942c8
tidy
a74nh Nov 4, 2024
66f84f7
Add DEBUG ifdefs
a74nh Nov 4, 2024
4025aa5
Add mask check in lsrabuild
a74nh Nov 4, 2024
a94c9af
Add conversion for local var uses
a74nh Nov 5, 2024
63a8b00
Add conversion for local stores
a74nh Nov 5, 2024
a08cf11
Comment for simd types
a74nh Nov 5, 2024
4cb8999
Use weight_t for weighting values
a74nh Nov 5, 2024
a15cbb7
Account for block weights and number of instructions in weighting.
a74nh Nov 5, 2024
968ba8d
Fix asserts
a74nh Nov 5, 2024
51619b5
Split weighting into current and switch
a74nh Nov 6, 2024
ef21a99
Add tests
a74nh Nov 6, 2024
da2dd8d
Allow tests to tier
a74nh Nov 6, 2024
b357296
update comments
a74nh Nov 6, 2024
a52adb4
additional comments
a74nh Nov 7, 2024
2679718
abort walking once found
a74nh Nov 7, 2024
6f008de
add comment to LCLMasksCheckLCLVarVisitor
a74nh Nov 7, 2024
08efa96
LCLMasks -> LclMasks
a74nh Nov 7, 2024
6c27e40
LCLStore -> LclStore
a74nh Nov 7, 2024
f37a321
LCLVar -> LclVar
a74nh Nov 7, 2024
dcf37f9
UpdateVarWeight -> UpdateUseWeight
a74nh Nov 7, 2024
98d3a7c
combine checks
a74nh Nov 7, 2024
7242cee
Catch conversions of both types
a74nh Nov 7, 2024
d6df5e3
better float printing
a74nh Nov 7, 2024
6b907e7
dump the updated tree with conversion
a74nh Nov 7, 2024
1bb871d
fix formatting
a74nh Nov 7, 2024
e562eec
Update explanation
a74nh Nov 8, 2024
659b7d9
extra tests and remove asserts
a74nh Nov 8, 2024
9f54fa8
move pass to lclmasks.cpp
a74nh Nov 8, 2024
7ef5f6b
Use vistors to iterate all nodes
a74nh Nov 8, 2024
04f0eb8
Rename visitors
a74nh Nov 8, 2024
5abaaa1
fix formatting
a74nh Nov 8, 2024
960e9f1
Add checks for LCL_ADDR
a74nh Nov 11, 2024
206c663
Add config option
a74nh Nov 11, 2024
c545618
Single Fact for all the tests
a74nh Nov 11, 2024
b247ed1
Only check statements where there is a local of type TYP_SIMD16/TYP_MASK
a74nh Nov 11, 2024
0f45300
Call fgSequenceLocals() once per statement
a74nh Nov 11, 2024
0666cc2
Use JitSmallPrimitiveKeyFuncs
a74nh Nov 11, 2024
43cc185
allow for nullptr user
a74nh Nov 11, 2024
cf3ceed
Remove uses of gtBashToNOP()
a74nh Nov 11, 2024
0a3a31a
Use DISPTREE
a74nh Nov 11, 2024
6d14519
update asserts
a74nh Nov 11, 2024
e243baa
Remove searching of convertOp
a74nh Nov 11, 2024
1c64781
remove "method" in tests
a74nh Nov 11, 2024
8563352
Use LookupPointerOrAdd()
a74nh Nov 11, 2024
3c90ec8
Remove Set() to table
a74nh Nov 11, 2024
82d959d
fix formatting
a74nh Nov 11, 2024
41c3d37
Rename all functions
a74nh Nov 12, 2024
ca9bf30
Use TypeIs()
a74nh Nov 12, 2024
518dabf
invalidate if cached simdtype differs
a74nh Nov 12, 2024
6d8e36d
use constructor for weightsTable
a74nh Nov 12, 2024
4f09a3c
check for address exposed variables
a74nh Nov 12, 2024
9fc3b65
Add allocator CMK_MaskConversionOpt
a74nh Nov 13, 2024
06b2e72
Simplify ChangeMatchUse.csproj
a74nh Nov 13, 2024
316ee5e
Hoist Sve check in testing
a74nh Nov 13, 2024
bc19566
Check for parameters and OSR locals
a74nh Nov 13, 2024
8073bf9
rename tests
a74nh Nov 13, 2024
e22f5ce
Don't convert uses of masks as vectors
a74nh Nov 13, 2024
a009ef2
Merge main
a74nh Nov 14, 2024
0883dd4
Merge main
a74nh Nov 14, 2024
0d60399
fix formatting
a74nh Nov 15, 2024
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1 change: 1 addition & 0 deletions src/coreclr/jit/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -156,6 +156,7 @@ set( JIT_SOURCES
objectalloc.cpp
optcse.cpp
optimizebools.cpp
optimizemaskconversions.cpp
optimizer.cpp
patchpoint.cpp
phase.cpp
Expand Down
4 changes: 4 additions & 0 deletions src/coreclr/jit/compiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4702,6 +4702,10 @@ void Compiler::compCompile(void** methodCodePtr, uint32_t* methodCodeSize, JitFl
//
DoPhase(this, PHASE_STR_ADRLCL, &Compiler::fgMarkAddressExposedLocals);

// Optimize away conversions to/from masks in local variables.
//
DoPhase(this, PHASE_OPTIMIZE_MASK_CONVERSIONS, &Compiler::fgOptimizeMaskConversions);

// Do an early pass of liveness for forward sub and morph. This data is
// valid until after morph.
//
Expand Down
5 changes: 4 additions & 1 deletion src/coreclr/jit/compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -6919,6 +6919,7 @@ class Compiler
AddCodeDsc* fgFindExcptnTarget(SpecialCodeKind kind, BasicBlock* fromBlock);
bool fgUseThrowHelperBlocks();
void fgCreateThrowHelperBlockCode(AddCodeDsc* add);
void fgSequenceLocals(Statement* stmt);

private:
bool fgIsThrowHlpBlk(BasicBlock* block);
Expand Down Expand Up @@ -6963,10 +6964,11 @@ class Compiler
void fgMarkDemotedImplicitByRefArgs();

PhaseStatus fgMarkAddressExposedLocals();
void fgSequenceLocals(Statement* stmt);
bool fgExposeUnpropagatedLocals(bool propagatedAny, class LocalEqualsLocalAddrAssertions* assertions);
void fgExposeLocalsInBitVec(BitVec_ValArg_T bitVec);

PhaseStatus fgOptimizeMaskConversions();

PhaseStatus PhysicalPromotion();

PhaseStatus fgForwardSub();
Expand Down Expand Up @@ -10015,6 +10017,7 @@ class Compiler
bool compSwitchedToOptimized = false; // Codegen initially was Tier0 but jit switched to FullOpts
bool compSwitchedToMinOpts = false; // Codegen initially was Tier1/FullOpts but jit switched to MinOpts
bool compSuppressedZeroInit = false; // There are vars with lvSuppressedZeroInit set
bool compMaskConvertUsed = false; // Does the method have Convert Mask To Vector nodes.

// NOTE: These values are only reliable after
// the importing is completely finished.
Expand Down
1 change: 1 addition & 0 deletions src/coreclr/jit/compmemkind.h
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,7 @@ CompMemKindMacro(TailMergeThrows)
CompMemKindMacro(EarlyProp)
CompMemKindMacro(ZeroInit)
CompMemKindMacro(Pgo)
CompMemKindMacro(MaskConversionOpt)
//clang-format on

#undef CompMemKindMacro
1 change: 1 addition & 0 deletions src/coreclr/jit/compphases.h
Original file line number Diff line number Diff line change
Expand Up @@ -46,6 +46,7 @@ CompPhaseNameMacro(PHASE_DFS_BLOCKS1, "DFS blocks and remove dead
CompPhaseNameMacro(PHASE_DFS_BLOCKS2, "DFS blocks and remove dead code 2",false, -1, false)
CompPhaseNameMacro(PHASE_DFS_BLOCKS3, "DFS blocks and remove dead code 3",false, -1, false)
CompPhaseNameMacro(PHASE_STR_ADRLCL, "Morph - Structs/AddrExp", false, -1, false)
CompPhaseNameMacro(PHASE_OPTIMIZE_MASK_CONVERSIONS, "Optimize mask conversions", false, -1, false)
CompPhaseNameMacro(PHASE_EARLY_LIVENESS, "Early liveness", false, -1, false)
CompPhaseNameMacro(PHASE_PHYSICAL_PROMOTION, "Physical promotion", false, -1, false)
CompPhaseNameMacro(PHASE_FWD_SUB, "Forward Substitution", false, -1, false)
Expand Down
1 change: 1 addition & 0 deletions src/coreclr/jit/fginline.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1659,6 +1659,7 @@ void Compiler::fgInsertInlineeBlocks(InlineInfo* pInlineInfo)
compQmarkUsed |= InlineeCompiler->compQmarkUsed;
compGSReorderStackLayout |= InlineeCompiler->compGSReorderStackLayout;
compHasBackwardJump |= InlineeCompiler->compHasBackwardJump;
compMaskConvertUsed |= InlineeCompiler->compMaskConvertUsed;

lvaGenericsContextInUse |= InlineeCompiler->lvaGenericsContextInUse;

Expand Down
2 changes: 2 additions & 0 deletions src/coreclr/jit/gentree.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -21496,6 +21496,7 @@ GenTree* Compiler::gtNewSimdCvtMaskToVectorNode(var_types type,
{
assert(varTypeIsMask(op1));
assert(varTypeIsSIMD(type));
compMaskConvertUsed = true;

#if defined(TARGET_XARCH)
return gtNewSimdHWIntrinsicNode(type, op1, NI_EVEX_ConvertMaskToVector, simdBaseJitType, simdSize);
Expand Down Expand Up @@ -21888,6 +21889,7 @@ GenTree* Compiler::gtNewSimdCvtVectorToMaskNode(var_types type,
{
assert(varTypeIsMask(type));
assert(varTypeIsSIMD(op1));
compMaskConvertUsed = true;

#if defined(TARGET_XARCH)
return gtNewSimdHWIntrinsicNode(TYP_MASK, op1, NI_EVEX_ConvertVectorToMask, simdBaseJitType, simdSize);
Expand Down
4 changes: 3 additions & 1 deletion src/coreclr/jit/jitconfigvalues.h
Original file line number Diff line number Diff line change
Expand Up @@ -571,7 +571,9 @@ OPT_CONFIG_INTEGER(JitDoValueNumber, "JitDoValueNumber", 1) // Perform value num

OPT_CONFIG_STRING(JitOptRepeatRange, "JitOptRepeatRange") // Enable JitOptRepeat based on method hash range

OPT_CONFIG_INTEGER(JitDoIfConversion, "JitDoIfConversion", 1) // Perform If conversion
OPT_CONFIG_INTEGER(JitDoIfConversion, "JitDoIfConversion", 1) // Perform If conversion
OPT_CONFIG_INTEGER(JitDoOptimizeMaskConversions, "JitDoOptimizeMaskConversions", 1) // Perform optimization of mask
// conversions

RELEASE_CONFIG_INTEGER(JitEnableOptRepeat, "JitEnableOptRepeat", 1) // If zero, do not allow JitOptRepeat
RELEASE_CONFIG_METHODSET(JitOptRepeat, "JitOptRepeat") // Runs optimizer multiple times on specified methods
Expand Down
2 changes: 1 addition & 1 deletion src/coreclr/jit/jithashtable.h
Original file line number Diff line number Diff line change
Expand Up @@ -309,7 +309,7 @@ class JitHashTable
// Arguments:
// k - the key
// v - the value
// kind - Normal, we are not allowed to overwrite
// kind - None, we are not allowed to overwrite
// Overwrite, we are allowed to overwrite
// currently only used by CHK/DBG builds in an assert.
//
Expand Down
4 changes: 2 additions & 2 deletions src/coreclr/jit/lsrabuild.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2766,12 +2766,12 @@ void LinearScan::buildIntervals()
{
calleeSaveCount = CNT_CALLEE_ENREG;
}
#if defined(TARGET_XARCH) && defined(FEATURE_SIMD)
#if (defined(TARGET_XARCH) || defined(TARGET_ARM64)) && defined(FEATURE_SIMD)
else if (varTypeUsesMaskReg(interval->registerType))
{
calleeSaveCount = CNT_CALLEE_SAVED_MASK;
}
#endif // TARGET_XARCH && FEATURE_SIMD
#endif // (TARGET_XARCH || TARGET_ARM64) && FEATURE_SIMD
else
{
assert(varTypeUsesFloatReg(interval->registerType));
Expand Down
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