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Release 6.1.8
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yuxin-azrtos committed Jul 28, 2021
1 parent 244365f commit d0dab58
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Showing 651 changed files with 11,659 additions and 10,719 deletions.
6 changes: 5 additions & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,11 @@ add_library("azrtos::${PROJECT_NAME}" ALIAS ${PROJECT_NAME})
set(CUSTOM_INC_DIR ${CMAKE_CURRENT_BINARY_DIR}/custom_inc)

# Pick up the port specific variables and apply them
add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/ports/${THREADX_ARCH}/${THREADX_TOOLCHAIN})
if(DEFINED THREADX_CUSTOM_PORT)
add_subdirectory(${THREADX_CUSTOM_PORT} threadx_port)
else()
add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/ports/${THREADX_ARCH}/${THREADX_TOOLCHAIN})
endif()

# Pick up the common stuff
add_subdirectory(${CMAKE_CURRENT_LIST_DIR}/common)
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2 changes: 1 addition & 1 deletion cmake/arm-none-eabi.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY)

set(CMAKE_C_FLAGS "${MCPU_FLAGS} ${VFP_FLAGS} ${SPEC_FLAGS} -fdata-sections -ffunction-sections -mlong-calls" CACHE INTERNAL "c compiler flags")
set(CMAKE_CXX_FLAGS "${MCPU_FLAGS} ${VFP_FLAGS} -fdata-sections -ffunction-sections -fno-rtti -fno-exceptions -mlong-calls" CACHE INTERNAL "cxx compiler flags")
set(CMAKE_ASM_FLAGS "${MCPU_FLAGS} -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
set(CMAKE_ASM_FLAGS "${MCPU_FLAGS} ${VFP_FLAGS} -x assembler-with-cpp" CACHE INTERNAL "asm compiler flags")
set(CMAKE_EXE_LINKER_FLAGS "${MCPU_FLAGS} ${LD_FLAGS} -Wl,--gc-sections" CACHE INTERNAL "exe link flags")

SET(CMAKE_C_FLAGS_DEBUG "-Og -g -ggdb3" CACHE INTERNAL "c debug compiler flags")
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7 changes: 5 additions & 2 deletions common/inc/tx_api.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@
/* APPLICATION INTERFACE DEFINITION RELEASE */
/* */
/* tx_api.h PORTABLE C */
/* 6.1.7 */
/* 6.1.8 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
Expand Down Expand Up @@ -72,6 +72,9 @@
/* 06-02-2021 Yuxin Zhou Modified comment(s), added */
/* Execution Profile support, */
/* resulting in version 6.1.7 */
/* 08-02-2021 Scott Larson Modified comment(s), and */
/* update patch number, */
/* resulting in version 6.1.8 */
/* */
/**************************************************************************/

Expand Down Expand Up @@ -104,7 +107,7 @@ extern "C" {
#define AZURE_RTOS_THREADX
#define THREADX_MAJOR_VERSION 6
#define THREADX_MINOR_VERSION 1
#define THREADX_PATCH_VERSION 7
#define THREADX_PATCH_VERSION 8

/* Define the following symbol for backward compatibility */
#define EL_PRODUCT_THREADX
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13 changes: 7 additions & 6 deletions common/src/tx_thread_create.c
Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_create PORTABLE C */
/* 6.1.7 */
/* 6.1.8 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
Expand Down Expand Up @@ -79,14 +79,15 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 05-19-2020 William E. Lamie Initial Version 6.0 */
/* 09-30-2020 William E. Lamie Modified comment(s), and */
/* 05-19-2020 William E. Lamie Initial Version 6.0 */
/* 09-30-2020 William E. Lamie Modified comment(s), and */
/* changed stack calculations */
/* to use ALIGN_TYPE integers, */
/* resulting in version 6.1 */
/* 06-02-2021 William E. Lamie Modified comment(s), and */
/* 06-02-2021 William E. Lamie Modified comment(s), and */
/* supported TX_MISRA_ENABLE, */
/* resulting in version 6.1.7 */
/* 08-02-2021 Scott Larson Removed unneeded cast, */
/* resulting in version 6.1.8 */
/* */
/**************************************************************************/
UINT _tx_thread_create(TX_THREAD *thread_ptr, CHAR *name_ptr, VOID (*entry_function)(ULONG id), ULONG entry_input,
Expand Down Expand Up @@ -128,7 +129,7 @@ ALIGN_TYPE updated_stack_start;
#else
new_stack_start = TX_POINTER_TO_ALIGN_TYPE_CONVERT(stack_start);
#endif /* TX_MISRA_ENABLE */
updated_stack_start = ((((ULONG) new_stack_start) + ((sizeof(ULONG)) - ((ULONG) 1)) ) & (~((sizeof(ULONG)) - ((ULONG) 1))));
updated_stack_start = (((new_stack_start) + ((sizeof(ULONG)) - ((ULONG) 1)) ) & (~((sizeof(ULONG)) - ((ULONG) 1))));

/* Determine if the starting stack address is different. */
if (new_stack_start != updated_stack_start)
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File renamed without changes.
7 changes: 5 additions & 2 deletions common_smp/inc/tx_api.h
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@
/* APPLICATION INTERFACE DEFINITION RELEASE */
/* */
/* tx_api.h PORTABLE SMP */
/* 6.1.7 */
/* 6.1.8 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
Expand Down Expand Up @@ -61,6 +61,9 @@
/* 06-02-2021 Scott Larson Added options for multiple */
/* block pool search & delay, */
/* resulting in version 6.1.7 */
/* 08-02-2021 Scott Larson Modified comment(s), and */
/* update patch number, */
/* resulting in version 6.1.8 */
/* */
/**************************************************************************/

Expand Down Expand Up @@ -109,7 +112,7 @@ extern "C" {
#define AZURE_RTOS_THREADX
#define THREADX_MAJOR_VERSION 6
#define THREADX_MINOR_VERSION 1
#define THREADX_PATCH_VERSION 7
#define THREADX_PATCH_VERSION 8

/* Define the following symbol for backward compatibility */
#define EL_PRODUCT_THREADX
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10 changes: 6 additions & 4 deletions common_smp/src/tx_thread_create.c
Original file line number Diff line number Diff line change
Expand Up @@ -37,7 +37,7 @@
/* FUNCTION RELEASE */
/* */
/* _tx_thread_create PORTABLE SMP */
/* 6.1.3 */
/* 6.1.8 */
/* AUTHOR */
/* */
/* William E. Lamie, Microsoft Corporation */
Expand Down Expand Up @@ -80,9 +80,11 @@
/* */
/* DATE NAME DESCRIPTION */
/* */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 12-31-2020 Andres Mlinar Modified comment(s), */
/* 09-30-2020 William E. Lamie Initial Version 6.1 */
/* 12-31-2020 Andres Mlinar Modified comment(s), */
/* resulting in version 6.1.3 */
/* 08-02-2021 Scott Larson Removed unneeded cast, */
/* resulting in version 6.1.8 */
/* */
/**************************************************************************/
UINT _tx_thread_create(TX_THREAD *thread_ptr, CHAR *name_ptr,
Expand Down Expand Up @@ -120,7 +122,7 @@ ALIGN_TYPE updated_stack_start;

/* Ensure the starting stack address is evenly aligned. */
new_stack_start = TX_POINTER_TO_ALIGN_TYPE_CONVERT(stack_start);
updated_stack_start = ((((ULONG) new_stack_start) + ((sizeof(ULONG)) - ((ULONG) 1)) ) & (~((sizeof(ULONG)) - ((ULONG) 1))));
updated_stack_start = (((new_stack_start) + ((sizeof(ULONG)) - ((ULONG) 1)) ) & (~((sizeof(ULONG)) - ((ULONG) 1))));

/* Determine if the starting stack address is different. */
if (new_stack_start != updated_stack_start)
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Binary file removed docs/support-policy-example.png
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14 changes: 12 additions & 2 deletions ports/cortex_m0/ac5/example_build/tx_initialize_low_level.s
Original file line number Diff line number Diff line change
Expand Up @@ -236,10 +236,14 @@ __tx_IntHandler
; VOID InterruptHandler (VOID)
; {
PUSH {r0, lr}

#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
; /* Do interrupt handler work here */
; /* .... */

#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
Expand All @@ -253,7 +257,13 @@ SysTick_Handler
; {
;
PUSH {r0, lr}
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -159,12 +159,12 @@ SysTick_Handler:
@ {
@
PUSH {r0, lr}
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_enter @ Call the ISR enter function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_exit @ Call the ISR exit function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
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118 changes: 79 additions & 39 deletions ports/cortex_m0/gnu/example_build/tx_initialize_low_level.S
Original file line number Diff line number Diff line change
Expand Up @@ -135,55 +135,95 @@ _tx_initialize_low_level:
@
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r1, =SYSTICK_CYCLES
STR r1, [r0, #0x14] @ Setup SysTick Reload Value
LDR r1, =0x7 @ Build SysTick Control Enable Value
STR r1, [r0, #0x10] @ Setup SysTick Control
@
@ /* Configure handler priorities. */
@
LDR r1, =0x00000000 @ Rsrv, UsgF, BusF, MemM
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r2, =0xD18 @
ADD r0, r0, r2 @
STR r1, [r0] @ Setup System Handlers 4-7 Priority Registers
LDR r1, =0xFF000000 @ SVCl, Rsrv, Rsrv, Rsrv
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r2, =0xD1C @
ADD r0, r0, r2 @
STR r1, [r0] @ Setup System Handlers 8-11 Priority Registers
@ Note: SVC must be lowest priority, which is 0xFF
LDR r1, =0x40FF0000 @ SysT, PnSV, Rsrv, DbgM
LDR r0, =0xE000E000 @ Build address of NVIC registers
LDR r2, =0xD20 @
ADD r0, r0, r2 @
STR r1, [r0] @ Setup System Handlers 12-15 Priority Registers
@ Note: PnSV must be lowest priority, which is 0xFF

@
@ /* Return to caller. */
@
BX lr
@}
@
@ /* System Tick timer interrupt handler */
STR r1, [r0, #0x14] // Setup SysTick Reload Value
LDR r1, =0x7 // Build SysTick Control Enable Value
STR r1, [r0, #0x10] // Setup SysTick Control

/* Configure handler priorities. */

LDR r1, =0x00000000 // Rsrv, UsgF, BusF, MemM
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r2, =0xD18 //
ADD r0, r0, r2 //
STR r1, [r0] // Setup System Handlers 4-7 Priority Registers
LDR r1, =0xFF000000 // SVCl, Rsrv, Rsrv, Rsrv
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r2, =0xD1C //
ADD r0, r0, r2 //
STR r1, [r0] // Setup System Handlers 8-11 Priority Registers
// Note: SVC must be lowest priority, which is 0xFF
LDR r1, =0x40FF0000 // SysT, PnSV, Rsrv, DbgM
LDR r0, =0xE000E000 // Build address of NVIC registers
LDR r2, =0xD20 //
ADD r0, r0, r2 //
STR r1, [r0] // Setup System Handlers 12-15 Priority Registers
// Note: PnSV must be lowest priority, which is 0xFF

/* Return to caller. */
BX lr
// }

/* Define shells for each of the unused vectors. */
.global __tx_BadHandler
.thumb_func
__tx_BadHandler:
B __tx_BadHandler

/* added to catch the hardfault */
.global __tx_HardfaultHandler
.thumb_func
__tx_HardfaultHandler:
B __tx_HardfaultHandler

/* Generic interrupt handler template */
.global __tx_IntHandler
.thumb_func
__tx_IntHandler:
// VOID InterruptHandler (VOID)
// {
PUSH {r0, lr}
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
/* Do interrupt handler work here */
/* BL <your C Function>.... */
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
// }

/* System Tick timer interrupt handler */
.global __tx_SysTickHandler
.global SysTick_Handler
.thumb_func
__tx_SysTickHandler:
.thumb_func
SysTick_Handler:
@ VOID SysTick_Handler (VOID)
@ {
@
// VOID SysTick_Handler (VOID)
// {
PUSH {r0, lr}
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_enter @ Call the ISR enter function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_exit @ Call the ISR exit function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
@ }
// }

/* NMI, DBG handlers */
.global __tx_NMIHandler
.thumb_func
__tx_NMIHandler:
B __tx_NMIHandler

.global __tx_DBGHandler
.thumb_func
__tx_DBGHandler:
B __tx_DBGHandler
8 changes: 4 additions & 4 deletions ports/cortex_m0/iar/example_build/tx_initialize_low_level.s
Original file line number Diff line number Diff line change
Expand Up @@ -166,12 +166,12 @@ SysTick_Handler:
; {
;
PUSH {r0, lr}
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_enter ; Call the ISR enter function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#ifdef TX_ENABLE_EXECUTION_CHANGE_NOTIFY
BL _tx_execution_isr_exit ; Call the ISR exit function
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
Expand Down
14 changes: 12 additions & 2 deletions ports/cortex_m0/keil/example_build/tx_initialize_low_level.s
Original file line number Diff line number Diff line change
Expand Up @@ -236,10 +236,14 @@ __tx_IntHandler
; VOID InterruptHandler (VOID)
; {
PUSH {r0, lr}

#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
; /* Do interrupt handler work here */
; /* .... */

#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
Expand All @@ -253,7 +257,13 @@ SysTick_Handler
; {
;
PUSH {r0, lr}
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_enter // Call the ISR enter function
#endif
BL _tx_timer_interrupt
#if (defined(TX_ENABLE_EXECUTION_CHANGE_NOTIFY) || defined(TX_EXECUTION_PROFILE_ENABLE))
BL _tx_execution_isr_exit // Call the ISR exit function
#endif
POP {r0, r1}
MOV lr, r1
BX lr
Expand Down
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