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Instance name is using a System Verilog keyword #34

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kauser-rl opened this issue Feb 22, 2022 · 5 comments
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Instance name is using a System Verilog keyword #34

kauser-rl opened this issue Feb 22, 2022 · 5 comments
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@RTimothyEdwards
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error Something isn't working RTL Verilog source code changed

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@kauser-rl
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I'm trying to simulate the Caravel SoC with our SystemVerilog based design. I'm using Verilator with SV enabled and hitting the below issue. Is it possible to rename the instance name please? I'm working around it locally by renaming the instance, but it is blocking me from making the simulation infrastructure available to others without the manual workaround.

%Error: ../../caravel_soc/verilog/rtl/caravel.v:614:22: syntax error, unexpected clocking, expecting IDENTIFIER or randomize 614 | caravel_clocking clocking( | ^~~~~~~~
@kauser-rl
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I can reproduce this issue using Icarus Verilog too if I use switches to enable newer version of the standard.

@mattvenn
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I think this is now resolved, I don't see any reference to 'instance' now in the caravel.v verilog.

@kauser-rl
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I still see it in the mpw-5c tag. Are you looking for the instance name clocking for the caravel_clocking module? It appears to still be there. Maybe it is fixed in HEAD, if so, any plans for a new tag?

RTimothyEdwards added a commit that referenced this issue Mar 22, 2022
@RTimothyEdwards
Corrected the issue reported on the github issue tracker (#34)
ce36553 
in which the use of "clocking" as an instance name in caravel and
caravan conflicts with the system verilog keyword of the same
name.
@RTimothyEdwards
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@mattvenn , @jeffdi : I have just created a pull request for this

@kauser-rl kauser-rl mentioned this issue Mar 24, 2022
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jeffdi pushed a commit that referenced this issue Apr 7, 2022
@RTimothyEdwards
Corrected the issue reported on the github issue tracker (#34) (#50)
07012ce 
* Corrected the issue reported on the github issue tracker (#34)
in which the use of "clocking" as an instance name in caravel and
caravan conflicts with the system verilog keyword of the same
name.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
@RTimothyEdwards
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The fix for this has just been merged and will be in effect starting with the tags for MPW-five.

antonblanchard pushed a commit to antonblanchard/caravel that referenced this issue Apr 27, 2022
@jeffdi
Merge pull request efabless#34 from Manarabdelaty/patch_2
f95fb24 
Update Makefile PDK_PATH
@jeffdi jeffdi moved this to Done in Caravel Redesign Sep 27, 2022
M0stafaRady pushed a commit that referenced this issue Sep 30, 2022
@RTimothyEdwards
Corrected the issue reported on the github issue tracker (#34) (#50)
c64bfb6 
* Corrected the issue reported on the github issue tracker (#34)
in which the use of "clocking" as an instance name in caravel and
caravan conflicts with the system verilog keyword of the same
name.

* Apply automatic changes to Manifest and README.rst

Co-authored-by: RTimothyEdwards <RTimothyEdwards@users.noreply.github.com>
@RTimothyEdwards RTimothyEdwards added error Something isn't working RTL Verilog source code changed labels Oct 4, 2022
@RTimothyEdwards RTimothyEdwards self-assigned this Oct 5, 2022
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@RTimothyEdwards RTimothyEdwards

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error Something isn't working RTL Verilog source code changed
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Caravel Redesign
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@mattvenn @RTimothyEdwards @kauser-rl