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Update libllvm for new RISCVGenMacroFusion.inc tblgen header.
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@DimitryAndric
DimitryAndric committed Feb 9, 2024
1 parent 92e38d7 commit a7fb520
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2 changes: 2 additions & 0 deletions lib/clang/libllvm/Makefile
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Expand Up @@ -2132,6 +2132,7 @@ beforebuild:
InstrInfo/-gen-instr-info${arch:MX86/X86:C/X86\/X86/,-instr-info-expand-mi-operand-info=0/} \
MCCodeEmitter/-gen-emitter \
MCPseudoLowering/-gen-pseudo-lowering \
MacroFusion/-gen-macro-fusion-pred \
MnemonicTables/-gen-x86-mnemonic-tables,-asmwriternum=1 \
O0PreLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}O0PreLegalizerCombiner \
PostLegalizeGICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PostLegalizerCombiner \
Expand Down Expand Up @@ -2245,6 +2246,7 @@ TGHDRS+= RISCVGenGlobalISel.inc
TGHDRS+= RISCVGenInstrInfo.inc
TGHDRS+= RISCVGenMCCodeEmitter.inc
TGHDRS+= RISCVGenMCPseudoLowering.inc
TGHDRS+= RISCVGenMacroFusion.inc
TGHDRS+= RISCVGenO0PreLegalizeGICombiner.inc
TGHDRS+= RISCVGenPostLegalizeGICombiner.inc
TGHDRS+= RISCVGenPreLegalizeGICombiner.inc
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