Merge pull request #16 from motec-research/name_pll_clkout

serwb/efinix: name rx_sys clkout

liteiclink/serwb/efinixserdes.py

@@ -274,7 +274,7 @@ def __init__(self, pads, mode="master", clk="sys", clk4x="sys4x", clk_ratio="1:1
                     lvds_input=True,
                     refclk_name=platform.get_pin_name(pads.clk_p) + "_gen",
                 )
-            pll.create_clkout(self.cd_rx_sys,   sys_clk_freq)
+            pll.create_clkout(self.cd_rx_sys,   sys_clk_freq,                              name="rx_sys")
             pll.create_clkout(self.cd_rx_clk,   sys_clk_freq/sys_clk_freq_div,             name="rx_clk", is_feedback=(platform.family=="Trion"))
             pll.create_clkout(self.cd_rx_clk4x, sys_clk_freq/sys_clk_freq_div*4, phase=90, name="rx_clk4x")