global: Use new WaitTimer integrated cast to int.

enjoy-digital · Aug 1, 2023 · 7a7389d · 7a7389d
1 parent 3b2af0a
commit 7a7389d
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Showing 4 changed files with 8 additions and 8 deletions.
diff --git a/liteiclink/serdes/gth_ultrascale_init.py b/liteiclink/serdes/gth_ultrascale_init.py
@@ -70,7 +70,7 @@ def __init__(self, sys_clk_freq, rx, buffer_enable):
         fsm = ResetInserter()(FSM(reset_state="RESET_ALL"))
         self.submodules.fsm = fsm
 
-        ready_timer = WaitTimer(int(10e-3*sys_clk_freq))
+        ready_timer = WaitTimer(10e-3*sys_clk_freq)
         self.submodules.ready_timer = ready_timer
         self.comb += [
             ready_timer.wait.eq(~self.done & ~fsm.reset),

diff --git a/liteiclink/serdes/gtp_7series_init.py b/liteiclink/serdes/gtp_7series_init.py
@@ -106,7 +106,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
             )
         )
         # Wait 500ns after configuration before releasing GTP reset (to follow AR43482)
-        init_delay = WaitTimer(int(500e-9*sys_clk_freq))
+        init_delay = WaitTimer(500e-9*sys_clk_freq)
         self.submodules += init_delay
         self.comb += init_delay.wait.eq(1)
         fsm.act("WAIT-INIT-DELAY",
@@ -164,7 +164,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
         )
 
         # FSM watchdog / restart
-        watchdog = WaitTimer(int(1e-3*sys_clk_freq))
+        watchdog = WaitTimer(1e-3*sys_clk_freq)
         self.submodules += watchdog
         self.comb += [
             watchdog.wait.eq(~fsm.reset & ~self.done),
@@ -245,7 +245,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
             NextState("WAIT-INIT-DELAY")
         )
         # Wait 500ns after configuration before releasing GTP reset (to follow AR43482)
-        init_delay = WaitTimer(int(500e-9*sys_clk_freq))
+        init_delay = WaitTimer(500e-9*sys_clk_freq)
         self.submodules += init_delay
         self.comb += init_delay.wait.eq(1)
         fsm.act("WAIT-INIT-DELAY",
@@ -329,7 +329,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
         )
 
         # FSM watchdog / restart
-        watchdog = WaitTimer(int(4e-3*sys_clk_freq))
+        watchdog = WaitTimer(4e-3*sys_clk_freq)
         self.submodules += watchdog
         self.comb += [
             watchdog.wait.eq(~fsm.reset & ~self.done),

diff --git a/liteiclink/serdes/gtx_7series_init.py b/liteiclink/serdes/gtx_7series_init.py
@@ -92,7 +92,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
             )
         )
         # Wait 500ns after configuration before releasing GTX reset (to follow AR43482)
-        init_delay = WaitTimer(int(500e-9*sys_clk_freq))
+        init_delay = WaitTimer(500e-9*sys_clk_freq)
         self.submodules += init_delay
         self.comb += init_delay.wait.eq(1)
         fsm.act("WAIT-INIT-DELAY",
@@ -154,7 +154,7 @@ def __init__(self, sys_clk_freq, buffer_enable):
         )
 
         # FSM watchdog / restart
-        watchdog = WaitTimer(int(1e-3*sys_clk_freq))
+        watchdog = WaitTimer(1e-3*sys_clk_freq)
         self.submodules += watchdog
         self.comb += [
             watchdog.wait.eq(~fsm.reset & ~self.done),

diff --git a/liteiclink/serdes/gty_ultrascale_init.py b/liteiclink/serdes/gty_ultrascale_init.py
@@ -67,7 +67,7 @@ def __init__(self, sys_clk_freq, rx, buffer_enable):
         fsm = ResetInserter()(FSM(reset_state="RESET_ALL"))
         self.submodules.fsm = fsm
 
-        ready_timer = WaitTimer(int(10e-3*sys_clk_freq))
+        ready_timer = WaitTimer(10e-3*sys_clk_freq)
         self.submodules += ready_timer
         self.comb += [
             ready_timer.wait.eq(~self.done & ~fsm.reset),