Merge pull request #12 from cklarhorst/patch-1

genphy: Fix init _SerdesClocking for diff clks

liteiclink/serwb/genphy.py

@@ -112,7 +112,7 @@ def __init__(self, pads):
 @ResetInserter()
 class _Serdes(Module):
     def __init__(self, pads, mode="master"):
-        if hasattr(pads, "clk"):
+        if hasattr(pads, "clk") or hasattr(pads, "clk_p"):
             self.submodules.clocking = _SerdesClocking(pads, mode)
         self.submodules.tx       = _SerdesTX(pads)
         self.submodules.rx       = _SerdesRX(pads)