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WIP: Serwb improvements #13
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WIP: Serwb improvements #13
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# https://support.xilinx.com/s/article/38408?language=en_US | ||
max_taps = {188: 107, 200: 101, 266:72, 333: 54, 400: 43, 533: 28, 625: 22, | ||
667: 20, 800: 14, 945: 9, 1000: 8, 1050: 7, 1080: 6} | ||
sys_freq = 50 # todo: how to get that information? |
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Does somebody know a good way to get the sysfreq, or is it ok to make it a parameter?
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Hi @cklarhorst,
that's indeed a point I want to improve and avoid having to pass sys_clk_freq parameter to all module that require it. (ie having access to it globally when elaborating a design). I'll try to work on such improvements in the future, but for now for this module, if sys_clk_freq is required, you can add an argument (and make it optional with a default value of None).
Hi @cklarhorst, thanks for your work, this is really interesting and the changes look good. #14 is now merged and happy to do a closer review of this PR when you think it will be ready. |
Thanks. (I have to change my focus for a month, so I will finish this PR sometime at the end of next month.) |
@cklarhorst Sure, no problem. |
Bit widths of 4,6,8 are supported for non cascaded serdese2 in ddr mode. Note that a width of 6 is currently useless because it is not supported by the stream converter.
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I decided to make this PR bigger:
My open todos:
Current additional ideas:
What was tested (sync + memtest over serwb, all with PR#14):
As always, thank you for this great project.
Let me know if there is anything I can improve or do differently to reduce work on your side.