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Builder enhancements #1759
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AndrewD
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Builder enhancements #1759
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allows use of parser.set_defaults() to more cleanly manage defaults for a target. Also changes arguments to enabled {True,False} vs "not disabled".
if soc is set this automatically passes arguments to the soc in soc_argdict to simplify board platforms. Example usage below: # IOs ---------------------------------------------------------------------------------------------- _io = [ # Clk / Rst. ("sys_clk", 0, Pins(1)), ("sys_rst", 0, Pins(1)), ] # Platform ----------------------------------------------------------------------------------------- class Platform(SimPlatform): name = "sim" def __init__(self): SimPlatform.__init__(self, "SIM", _io) # MySimSoC ---------------------------------------------------------------------------------------- class MySimSoC(SoCCore): def __init__(self, sys_clk_freq, etherbone, etherbone_mac_address, etherbone_ip_address, **kwargs): # etc # Build -------------------------------------------------------------------------------------------- def main(): from litex.build.parser import LiteXArgumentParser bool_action = argparse.BooleanOptionalAction parser = LiteXArgumentParser(platform=Platform, soc=MySimSoC, description="My simulation.") # NOTE: all target arguments have a default here, not in soc.__init__(), so they are documented. parser.add_target_argument("--sys-clk-freq", default=100e6, type=float, help="System clock frequency.") parser.add_target_argument("--etherbone", default=False, action=bool_action, help="Include Etherbone support.") parser.add_target_argument("--etherbone-mac-address", default=0x10e2d5000000, help="Etherbone MAC address.") parser.add_target_argument("--etherbone-ip-address", default="192.168.1.50", help="Etherbone IP address.") # override some defaults parser.set_defaults(trace=True) parser.set_defaults(trace_fst=True) parser.set_defaults(timer_uptime=True) parser.set_defaults(integrated_rom_size=0x10000) parser.set_defaults(integrated_main_ram_size=0x10000) parser.set_defaults(uart_name="sim") # "crossover" for terminal via etherbone parser.set_defaults(soc_csv="scr.csv") args = parser.parse_args() # etc # Create SoC. soc = MySimSoC(**parser.soc_argdict) # args are automatically passed
allows use of parser.set_defaults()
Thanks @AndrewD, I'll review it very soon. |
For convenience: the code above with ``` before/after
|
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Various enhancements to reduce boilerplate code in target arguments and to cleanly allow a target to initialise memory with a custom firmware (for example).
Custom firmware example:
class MySimSoC(SoCCore):
def init(self, firmware, **kwargs):
Build --------------------------------------------------------------------------------------------
def main():
from litex.build.parser import LiteXArgumentParser
bool_action = argparse.BooleanOptionalAction
parser = LiteXArgumentParser(platform=Platform, soc=MySimSoC, description="My simulation.")