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soc/integration: Ensure the video framebuffer fits in main RAM #1915

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21 changes: 19 additions & 2 deletions litex/soc/integration/soc.py
Original file line number Diff line number Diff line change
Expand Up @@ -2363,14 +2363,31 @@ def add_video_framebuffer(self, name="video_framebuffer", phy=None, timings="800
timings = timings if isinstance(timings, str) else timings[0]
base = self.mem_map.get(name, None)
if base is None:
base = 0x40c00000
size = 0x800000
# If the intended region isn't contained in the main_ram region, adjust it to fit.
main_ram_region = self.bus.regions.get("main_ram", None)
if main_ram_region is None:
self.logger.error("Video framebuffer requires SDRAM")
raise SoCError()
contained_in_main_ram = (
main_ram_region.origin < base
and base + size < main_ram_region.origin + main_ram_region.size
)
if not contained_in_main_ram:
size = min(size, main_ram_region.size // 2)
base = main_ram_region.origin + main_ram_region.size - size
self.bus.add_region(name, SoCRegion(
origin = 0x40c00000,
size = 0x800000,
origin = base,
size = size,
linker = True)
)
base = self.bus.regions[name].origin
hres = int(timings.split("@")[0].split("x")[0])
vres = int(timings.split("@")[0].split("x")[1])
if not hasattr(self, "sdram"):
self.logger.error("Video framebuffer requires SDRAM")
raise SoCError()
vfb = VideoFrameBuffer(self.sdram.crossbar.get_port(),
hres = hres,
vres = vres,
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