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CSR ordering support in generated files #1921

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CSR ordering support in generated files #1921

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ab678b4
soc/integration: add csr ordering support
Apr 8, 2024
1d7c738
tools/litex_json2dts_linux: add *-endian to support csr ordering
Apr 8, 2024
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14 changes: 9 additions & 5 deletions litex/soc/integration/export.py
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Original file line number Diff line number Diff line change
Expand Up @@ -199,7 +199,7 @@ def _get_csr_addr(csr_base, addr, with_csr_base_define=True):
else:
return f"{hex(csr_base + addr)}L"

def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, read_only, csr_base, with_csr_base_define, with_access_functions):
def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, ordering, read_only, csr_base, with_csr_base_define, with_access_functions):
r = ""

addr_str = f"CSR_{reg_name.upper()}_ADDR"
Expand All @@ -225,8 +225,10 @@ def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, read_onl
if with_access_functions:
r += f"static inline {ctype} {reg_name}_read(void) {{\n"
if nwords > 1:
r += f"\t{ctype} r = csr_read_simple({_get_csr_addr(csr_base, reg_base, with_csr_base_define)});\n"
for sub in range(1, nwords):
start, stop, step = (0, nwords, 1) if ordering == "big" else (nwords-1, -1, -1)
r += f"\t{ctype} r = csr_read_simple({_get_csr_addr(csr_base, reg_base+start*stride, with_csr_base_define)});\n"
start += step
for sub in range(start, stop, step):
r += f"\tr <<= {busword};\n"
r += f"\tr |= csr_read_simple({_get_csr_addr(csr_base, reg_base+sub*stride, with_csr_base_define)});\n"
r += "\treturn r;\n}\n"
Expand All @@ -236,18 +238,19 @@ def _get_rw_functions_c(reg_name, reg_base, nwords, busword, alignment, read_onl
if not read_only:
r += f"static inline void {reg_name}_write({ctype} v) {{\n"
for sub in range(nwords):
shift = (nwords-sub-1)*busword
shift = ((nwords-sub-1)*busword) if ordering == "big" else (sub*busword)
if shift:
v_shift = "v >> {}".format(shift)
else:
v_shift = "v"
r += f"\tcsr_write_simple({v_shift}, {_get_csr_addr(csr_base, reg_base+sub*stride, with_csr_base_define)});\n"
r += f"\tcsr_write_simple((uint32_t)({v_shift}), {_get_csr_addr(csr_base, reg_base+sub*stride, with_csr_base_define)});\n"
r += "}\n"
return r


def get_csr_header(regions, constants, csr_base=None, with_csr_base_define=True, with_access_functions=True):
alignment = constants.get("CONFIG_CSR_ALIGNMENT", 32)
ordering = constants.get("CONFIG_CSR_ORDERING", "big")
r = generated_banner("//")
if with_access_functions: # FIXME
r += "#include <generated/soc.h>\n"
Expand Down Expand Up @@ -278,6 +281,7 @@ def get_csr_header(regions, constants, csr_base=None, with_csr_base_define=True,
nwords = nr,
busword = region.busword,
alignment = alignment,
ordering = ordering,
read_only = getattr(csr, "read_only", False),
csr_base = csr_base,
with_csr_base_define = base_define,
Expand Down
2 changes: 2 additions & 0 deletions litex/soc/integration/soc.py
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Original file line number Diff line number Diff line change
Expand Up @@ -1145,6 +1145,8 @@ def add_csr_bridge(self, name="csr", origin=None, register=False):
self.csr.add_master(name=name, master=csr_bridge.csr)
self.add_config("CSR_DATA_WIDTH", self.csr.data_width)
self.add_config("CSR_ALIGNMENT", self.csr.alignment)
self.add_config("CSR_ORDERING", self.csr.ordering)
self.add_config(f"CSR_ORDERING_{self.csr.ordering.upper()}")

# Add CPU --------------------------------------------------------------------------------------
def add_cpu(self, name="vexriscv", variant="standard", reset_address=None, cfu=None):
Expand Down
7 changes: 7 additions & 0 deletions litex/tools/litex_json2dts_linux.py
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Original file line number Diff line number Diff line change
Expand Up @@ -54,6 +54,11 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic

cpu_mmu = d["constants"].get("config_cpu_mmu", None)

# CSR Parameters -------------------------------------------------------------------------------
csr_ordering = d["constants"].get("config_csr_ordering", "big")
assert csr_ordering in ["big", "little"]
dts_endian = f"{csr_ordering}-endian;"

# Header ---------------------------------------------------------------------------------------
dts = """
/dts-v1/;
Expand Down Expand Up @@ -521,6 +526,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
vmmc-supply = <&vreg_mmc>;
bus-width = <0x04>;
{sdcard_irq_interrupt}
{dts_endian}
status = "okay";
}};
""".format(
Expand All @@ -530,6 +536,7 @@ def generate_dts(d, initrd_start=None, initrd_size=None, initrd=None, root_devic
sdcard_block2mem = d["csr_bases"]["sdcard_block2mem"],
sdcard_mem2block = d["csr_bases"]["sdcard_mem2block"],
sdcard_irq = d["csr_bases"]["sdcard_irq"],
dts_endian = dts_endian,
sdcard_irq_interrupt = "" if polling else "interrupts = <{}>;".format(d["constants"]["sdcard_irq_interrupt"])
)
# Leds -----------------------------------------------------------------------------------------
Expand Down
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