Write speed tuning

[mactcp]

Instruction alignment and pipelining is complicated, I still don't fully understand why the first nop this adds makes things faster.

The second nop change is to add an extra cycle, as the 2 prior instructions (mvn and strb) seem to be pipelining together so the code only had 4 cycles between setting REQ and waiting for ACK.

I'm seeing about a 5% to 7% increase in write speed measured with SCSI Director:
Mac LC III+: Was 865 now 926
Quadra 650: Was 1175 now 1234
PowerMac 7100/80: Was 1280 now 1350

[erichelgeson]

Thanks again @mactcp -

Instruction alignment and pipelining is complicated

If you have time could you do a small write up (maybe on the github discussions page or wiki) on how you're doing this analysis? This type of analysis is not something I've looked at before and would be interested in the details!