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Add #![deny(missing_docs)] to the aes, analog, clock, and dma modules #5776

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Add #![deny(missing_docs)] to the aes, analog, clock, and dma modules

Add #![deny(missing_docs)] to the aes, analog, clock, and dma modules #5776

Workflow file for this run

.github/workflows/ci.yml at 83cf135
# NOTE:
#
# When adding support for a new chip to `esp-hal`, there are a number of
# updates which must be made to the CI workflow in order to reflect this; the
# changes are:
#
# 1.) In the 'esp-hal' job, add the name of the chip to the `matrix.soc` array.
# 1a.) If the device has a low-power core (which is supported in
# `esp-lp-hal`), then update the `if` condition to build prerequisites.
# 2.) In the 'msrv-riscv' job, add checks as needed for the new chip.
name: CI
on:
pull_request:
push:
branches-ignore:
- "gh-readonly-queue/**"
merge_group:
workflow_dispatch:
env:
CARGO_TERM_COLOR: always
GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }}
MSRV: "1.76.0"
# Cancel any currently running workflows from the same PR, branch, or
# tag when a new workflow is triggered.
#
# https://stackoverflow.com/a/66336834
concurrency:
cancel-in-progress: true
group: ${{ github.workflow }}-${{ github.event.pull_request.number || github.ref }}
jobs:
# --------------------------------------------------------------------------
# Build Packages
esp-hal:
name: esp-hal (${{ matrix.device.soc }})
runs-on: ubuntu-latest
env:
SSID: SSID
PASSWORD: PASSWORD
STATIC_IP: 1.1.1.1
GATEWAY_IP: 1.1.1.1
HOST_IP: 1.1.1.1
strategy:
fail-fast: false
matrix:
device: [
# RISC-V devices:
{ soc: "esp32c2", target: "riscv32imc-unknown-none-elf" },
{ soc: "esp32c3", target: "riscv32imc-unknown-none-elf" },
{ soc: "esp32c6", target: "riscv32imac-unknown-none-elf" },
{ soc: "esp32h2", target: "riscv32imac-unknown-none-elf" },
# Xtensa devices:
{ soc: "esp32", target: "xtensa-esp32-none-elf" },
{ soc: "esp32s2", target: "xtensa-esp32s2-none-elf" },
{ soc: "esp32s3", target: "xtensa-esp32s3-none-elf" },
]
steps:
- uses: actions/checkout@v4
# Install the Rust toolchain for Xtensa devices:
- uses: esp-rs/xtensa-toolchain@v1.5
with:
default: true
ldproxy: false
# Install the Rust stable and nightly toolchains for RISC-V devices:
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: stable
components: rust-src
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: nightly
components: rust-src
- uses: Swatinem/rust-cache@v2
# Build all supported examples for the low-power core first (if present):
- if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
name: Build prerequisite examples (esp-lp-hal)
run: cargo xtask build-examples esp-lp-hal ${{ matrix.device.soc }}
- if: contains(fromJson('["esp32c6", "esp32s2", "esp32s3"]'), matrix.device.soc)
name: Check esp-lp-hal documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-lp-hal --chips ${{ matrix.device.soc }}
# Make sure we're able to build the HAL without the default features
# enabled:
- name: Build (no features)
run: |
cargo xtask build-package \
--no-default-features \
--features=${{ matrix.device.soc }} \
--target=${{ matrix.device.target }} \
esp-hal
# Build all supported examples for the specified device:
- name: Build (examples)
run: cargo xtask build-examples esp-hal ${{ matrix.device.soc }}
# Check doc-tests
- name: Check doc-tests
run: cargo +esp xtask run-doc-test esp-hal ${{ matrix.device.soc }}
- name: Check documentation
run: RUSTDOCFLAGS="-D warnings" cargo xtask build-documentation --packages esp-hal --chips ${{ matrix.device.soc }}
# Run clippy
- name: Clippy
# We use the 'esp' toolchain for *all* targets, in order to get a
# semi-stable and consistent set of lints for all targets:
run: cargo +esp xtask lint-packages --chips ${{ matrix.device.soc }}
extras:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
- uses: dtolnay/rust-toolchain@v1
with:
toolchain: stable
- uses: Swatinem/rust-cache@v2
- name: Install dependencies
run: sudo apt-get update && sudo apt-get -y install musl-tools libudev-dev pkg-config
# Build the extra crates
- name: Build the bench-server
run: cd extras/bench-server && cargo build
- name: Build esp-wifishark
run: cd extras/esp-wifishark && cargo build
- name: Build ieee802154-sniffer
run: cd extras/ieee802154-sniffer && cargo build
# --------------------------------------------------------------------------
# MSRV
msrv:
runs-on: ubuntu-latest
env:
RUSTC_BOOTSTRAP: 1
steps:
- uses: actions/checkout@v4
# install esp toolchain first so it isn't set as the default
- uses: esp-rs/xtensa-toolchain@v1.5
with:
default: true
ldproxy: false
version: ${{ env.MSRV }}
- uses: dtolnay/rust-toolchain@v1
with:
target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf
toolchain: ${{ env.MSRV }}
components: rust-src
- uses: Swatinem/rust-cache@v2
# Verify the MSRV for all RISC-V chips.
- name: msrv RISCV (esp-hal)
run: |
cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf esp-hal
# Verify the MSRV for all Xtensa chips:
- name: msrv Xtensa (esp-hal)
run: |
cargo xtask build-package --toolchain=esp --features=esp32,ci --target=xtensa-esp32-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal
- name: msrv (esp-lp-hal)
run: |
cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf esp-lp-hal
cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf esp-lp-hal
# --------------------------------------------------------------------------
# Format
rustfmt:
runs-on: ubuntu-latest
steps:
- uses: actions/checkout@v4
# Some of the configuration items in 'rustfmt.toml' require the 'nightly'
# release channel:
- uses: dtolnay/rust-toolchain@v1
with:
toolchain: nightly
components: rustfmt
- uses: Swatinem/rust-cache@v2
# Check the formatting of all packages:
- run: cargo xtask fmt-packages --check
# --------------------------------------------------------------------------
# Tests
hil:
name: HIL Test | ${{ matrix.target.soc }}
runs-on: ubuntu-latest
strategy:
fail-fast: false
matrix:
target:
# RISC-V devices:
- soc: esp32c2
rust-target: riscv32imc-unknown-none-elf
- soc: esp32c3
rust-target: riscv32imc-unknown-none-elf
- soc: esp32c6
rust-target: riscv32imac-unknown-none-elf
- soc: esp32h2
rust-target: riscv32imac-unknown-none-elf
# Xtensa devices:
- soc: esp32
- soc: esp32s2
- soc: esp32s3
steps:
- uses: actions/checkout@v4
# Install the Rust toolchain for RISC-V devices:
- if: ${{ !contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.target.soc) }}
uses: dtolnay/rust-toolchain@v1
with:
target: ${{ matrix.target.rust-target }}
toolchain: nightly
components: rust-src
# Install the Rust toolchain for Xtensa devices:
- if: contains(fromJson('["esp32", "esp32s2", "esp32s3"]'), matrix.target.soc)
uses: esp-rs/xtensa-toolchain@v1.5
with:
buildtargets: ${{ matrix.target.soc }}
default: true
ldproxy: false
- uses: Swatinem/rust-cache@v2
- run: cargo xtask build-tests ${{ matrix.target.soc }}