Fix defmt compatibility #6563
Workflow file for this run
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| # NOTE: | |
| # | |
| # When adding support for a new chip to `esp-hal`, there are a number of | |
| # updates which must be made to the CI workflow in order to reflect this; the | |
| # changes are: | |
| # | |
| # 1.) In the 'esp-hal' job, add the name of the chip to the `matrix.soc` array. | |
| # 1a.) If the device has a low-power core (which is supported in | |
| # `esp-lp-hal`), then update the `if` condition to build prerequisites. | |
| # 2.) In the 'msrv' job, add checks as needed for the new chip. | |
| name: CI | |
| on: | |
| pull_request: | |
| push: | |
| branches-ignore: | |
| - "gh-readonly-queue/**" | |
| merge_group: | |
| workflow_dispatch: | |
| env: | |
| CARGO_TERM_COLOR: always | |
| GITHUB_TOKEN: ${{ secrets.GITHUB_TOKEN }} | |
| MSRV: "1.76.0" | |
| RUSTDOCFLAGS: -Dwarnings | |
| # Cancel any currently running workflows from the same PR, branch, or | |
| # tag when a new workflow is triggered. | |
| # | |
| # https://stackoverflow.com/a/66336834 | |
| concurrency: | |
| cancel-in-progress: true | |
| group: ${{ github.workflow }}-${{ github.event.pull_request.number || github.ref }} | |
| jobs: | |
| # -------------------------------------------------------------------------- | |
| # Build Packages | |
| esp-hal: | |
| name: esp-hal (${{ matrix.device.soc }}) | |
| runs-on: ubuntu-latest | |
| env: | |
| SSID: SSID | |
| PASSWORD: PASSWORD | |
| STATIC_IP: 1.1.1.1 | |
| GATEWAY_IP: 1.1.1.1 | |
| HOST_IP: 1.1.1.1 | |
| strategy: | |
| fail-fast: false | |
| matrix: | |
| device: [ | |
| # RISC-V devices: | |
| { soc: "esp32c2", target: "riscv32imc-unknown-none-elf", toolchain: "stable" }, | |
| { soc: "esp32c3", target: "riscv32imc-unknown-none-elf", toolchain: "stable" }, | |
| { soc: "esp32c6", target: "riscv32imac-unknown-none-elf", toolchain: "stable" }, | |
| { soc: "esp32h2", target: "riscv32imac-unknown-none-elf", toolchain: "stable" }, | |
| # Xtensa devices: | |
| { soc: "esp32", target: "xtensa-esp32-none-elf", toolchain: "esp" }, | |
| { soc: "esp32s2", target: "xtensa-esp32s2-none-elf", toolchain: "esp" }, | |
| { soc: "esp32s3", target: "xtensa-esp32s3-none-elf", toolchain: "esp" }, | |
| ] | |
| steps: | |
| - uses: actions/checkout@v4 | |
| # Install the Rust toolchain for Xtensa devices: | |
| - uses: esp-rs/xtensa-toolchain@v1.5 | |
| with: | |
| ldproxy: false | |
| # Install the Rust stable toolchain for RISC-V devices: | |
| - uses: dtolnay/rust-toolchain@v1 | |
| with: | |
| target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf | |
| toolchain: stable | |
| components: rust-src | |
| - uses: Swatinem/rust-cache@v2 | |
| - name: Build and Check | |
| uses: ./.github/actions/check-esp-hal | |
| with: | |
| device: ${{ matrix.device.soc }} | |
| target: ${{ matrix.device.target }} | |
| toolchain: ${{ matrix.device.toolchain }} | |
| extras: | |
| runs-on: ubuntu-latest | |
| steps: | |
| - uses: actions/checkout@v4 | |
| - uses: dtolnay/rust-toolchain@v1 | |
| with: | |
| toolchain: stable | |
| - uses: Swatinem/rust-cache@v2 | |
| - name: Install dependencies | |
| run: sudo apt-get update && sudo apt-get -y install musl-tools libudev-dev pkg-config | |
| # Build the extra crates | |
| - name: Build the bench-server | |
| run: cd extras/bench-server && cargo build | |
| - name: Build esp-wifishark | |
| run: cd extras/esp-wifishark && cargo build | |
| - name: Build ieee802154-sniffer | |
| run: cd extras/ieee802154-sniffer && cargo build | |
| # -------------------------------------------------------------------------- | |
| # MSRV | |
| msrv: | |
| runs-on: ubuntu-latest | |
| env: | |
| RUSTC_BOOTSTRAP: 1 | |
| steps: | |
| - uses: actions/checkout@v4 | |
| - uses: esp-rs/xtensa-toolchain@v1.5 | |
| with: | |
| ldproxy: false | |
| version: ${{ env.MSRV }} | |
| - uses: dtolnay/rust-toolchain@v1 | |
| with: | |
| target: riscv32imc-unknown-none-elf,riscv32imac-unknown-none-elf | |
| toolchain: ${{ env.MSRV }} | |
| components: rust-src | |
| - uses: Swatinem/rust-cache@v2 | |
| # Verify the MSRV for all RISC-V chips. | |
| - name: msrv RISCV (esp-hal) | |
| run: | | |
| cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf esp-hal | |
| cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf esp-hal | |
| cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf esp-hal | |
| cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf esp-hal | |
| # Verify the MSRV for all Xtensa chips: | |
| - name: msrv Xtensa (esp-hal) | |
| run: | | |
| cargo xtask build-package --toolchain=esp --features=esp32,ci --target=xtensa-esp32-none-elf esp-hal | |
| cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal | |
| cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal | |
| - name: msrv (esp-lp-hal) | |
| run: | | |
| cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal | |
| cargo xtask build-package --features=esp32s2 --target=riscv32imc-unknown-none-elf esp-lp-hal | |
| cargo xtask build-package --features=esp32s3 --target=riscv32imc-unknown-none-elf esp-lp-hal | |
| # -------------------------------------------------------------------------- | |
| # Format | |
| rustfmt: | |
| runs-on: ubuntu-latest | |
| steps: | |
| - uses: actions/checkout@v4 | |
| # Some of the configuration items in 'rustfmt.toml' require the 'nightly' | |
| # release channel: | |
| - uses: dtolnay/rust-toolchain@v1 | |
| with: | |
| toolchain: nightly | |
| components: rustfmt | |
| - uses: Swatinem/rust-cache@v2 | |
| # Check the formatting of all packages: | |
| - run: cargo xtask fmt-packages --check |