fix: Update tests and examples

esp-rs · May 24, 2024 · 94368ee · 94368ee
1 parent 4c26ce8
commit 94368ee
Show file tree

Hide file tree

Showing 6 changed files with 102 additions and 51 deletions.
diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs
@@ -23,7 +23,7 @@
 //! let pins = TxRxPins::new_tx_rx(io.pins.gpio1, io.pins.gpio2);
 //!
 //! let mut uart1 = Uart::new_with_config(peripherals.UART1, Config::default(), &clocks)
-//!     .with_tx_rx(&mut io.pins.gpio1, &mut io.pins.gpio2);
+//!     .with_tx_rx(io.pins.gpio1, io.pins.gpio2);
 //! ```
 //!
 //! ## Usage
@@ -68,9 +68,9 @@ use core::marker::PhantomData;
 use self::config::Config;
 use crate::{
     clock::Clocks,
-    gpio::{InputPin, InputSignal, NoPinType, OutputPin, OutputSignal},
+    gpio::{InputPin, InputSignal, OutputPin, OutputSignal},
     interrupt::InterruptHandler,
-    peripheral::{Peripheral, PeripheralRef},
+    peripheral::Peripheral,
     peripherals::{
         uart0::{fifo::FIFO_SPEC, RegisterBlock},
         Interrupt,
@@ -408,7 +408,7 @@ where
 {
     /// Create a new UART instance with configuration options in [`Blocking`]
     /// mode.
-    pub fn new_with_config<P>(
+    pub fn new_with_config(
         uart: impl Peripheral<P = T> + 'd,
         config: Config,
         clocks: &Clocks,
@@ -1779,15 +1779,11 @@ mod asynch {
     {
         /// Create a new UART instance with configuration options in [`Async`]
         /// mode.
-        pub fn new_async_with_config<P>(
+        pub fn new_async_with_config(
             uart: impl Peripheral<P = T> + 'd,
             config: Config,
-            pins: Option<P>,
             clocks: &Clocks,
-        ) -> Self
-        where
-            P: UartPins,
-        {
+        ) -> Self {
             Self::new_with_config_inner(
                 uart,
                 config,
@@ -1806,12 +1802,86 @@ mod asynch {
 
         /// Create a new UART instance with defaults in [`Async`] mode.
         pub fn new_async(uart: impl Peripheral<P = T> + 'd, clocks: &Clocks) -> Self {
-            Self::new_async_with_config(
-                uart,
-                Default::default(),
-                None::<TxRxPins<'_, NoPinType, NoPinType>>,
-                clocks,
-            )
+            Self::new_async_with_config(uart, Default::default(), clocks)
+        }
+
+        /// Configure TX and RX pins
+        pub fn with_tx_rx<TX: OutputPin, RX: InputPin>(
+            self,
+            tx: impl Peripheral<P = TX> + 'd,
+            rx: impl Peripheral<P = RX> + 'd,
+        ) -> Self {
+            crate::into_ref!(tx);
+            crate::into_ref!(rx);
+            tx.set_to_push_pull_output(crate::private::Internal);
+            tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
+
+            rx.set_to_input(crate::private::Internal);
+            rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
+            self
+        }
+
+        /// Configure TX and RX pins
+        pub fn with_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
+            self,
+            tx: impl Peripheral<P = TX> + 'd,
+            rx: impl Peripheral<P = RX> + 'd,
+            cts: impl Peripheral<P = CTS> + 'd,
+            rts: impl Peripheral<P = RTS> + 'd,
+        ) -> Self {
+            crate::into_ref!(tx);
+            crate::into_ref!(rx);
+            crate::into_ref!(cts);
+            crate::into_ref!(rts);
+
+            tx.set_to_push_pull_output(crate::private::Internal);
+            tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
+
+            rx.set_to_input(crate::private::Internal);
+            rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
+
+            cts.set_to_input(crate::private::Internal);
+            cts.connect_input_to_peripheral(T::cts_signal(), crate::private::Internal);
+
+            rts.set_to_push_pull_output(crate::private::Internal);
+            rts.connect_peripheral_to_output(T::rts_signal(), crate::private::Internal);
+            self
+        }
+
+        /// Configure TX pin
+        pub fn with_tx<TX: OutputPin>(self, tx: impl Peripheral<P = TX> + 'd) -> Self {
+            crate::into_ref!(tx);
+            tx.set_to_push_pull_output(crate::private::Internal);
+            tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
+
+            self
+        }
+
+        /// Configure RX pin
+        pub fn with_rx<RX: InputPin>(self, rx: impl Peripheral<P = RX> + 'd) -> Self {
+            crate::into_ref!(rx);
+            rx.set_to_input(crate::private::Internal);
+            rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
+
+            self
+        }
+
+        /// Configure CTS pin
+        pub fn with_cts<CTS: InputPin>(self, cts: impl Peripheral<P = CTS> + 'd) -> Self {
+            crate::into_ref!(cts);
+            cts.set_to_input(crate::private::Internal);
+            cts.connect_input_to_peripheral(T::cts_signal(), crate::private::Internal);
+
+            self
+        }
+
+        /// Configure RTS pin
+        pub fn with_rts<RTS: OutputPin>(self, rts: impl Peripheral<P = RTS> + 'd) -> Self {
+            crate::into_ref!(rts);
+            rts.set_to_push_pull_output(crate::private::Internal);
+            rts.connect_peripheral_to_output(T::rts_signal(), crate::private::Internal);
+
+            self
         }
     }
 

diff --git a/examples/src/bin/advanced_serial.rs b/examples/src/bin/advanced_serial.rs
@@ -20,7 +20,7 @@ use esp_hal::{
     peripherals::Peripherals,
     prelude::*,
     system::SystemControl,
-    uart::{config::Config, TxRxPins, Uart},
+    uart::{config::Config, Uart},
 };
 use esp_println::println;
 use nb::block;
@@ -32,15 +32,9 @@ fn main() -> ! {
     let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
 
     let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
-    let pins = TxRxPins::new_tx_rx(io.pins.gpio4, io.pins.gpio5);
-
-    let mut serial1 = Uart::new_with_config(
-        peripherals.UART1,
-        Config::default(),
-        Some(pins),
-        &clocks,
-        None,
-    );
+
+    let mut serial1 = Uart::new_with_config(peripherals.UART1, Config::default(), &clocks, None)
+        .with_tx_rx(io.pins.gpio4, io.pins.gpio5);
 
     let delay = Delay::new(&clocks);
 

diff --git a/examples/src/bin/lp_core_uart.rs b/examples/src/bin/lp_core_uart.rs
@@ -21,7 +21,7 @@ use esp_hal::{
     peripherals::Peripherals,
     prelude::*,
     system::SystemControl,
-    uart::{config::Config, lp_uart::LpUart, TxRxPins, Uart},
+    uart::{config::Config, lp_uart::LpUart, Uart},
 };
 use esp_println::println;
 
@@ -35,15 +35,8 @@ fn main() -> ! {
 
     // Set up (HP) UART1:
 
-    let pins = TxRxPins::new_tx_rx(io.pins.gpio6, io.pins.gpio7);
-
-    let mut uart1 = Uart::new_with_config(
-        peripherals.UART1,
-        Config::default(),
-        Some(pins),
-        &clocks,
-        None,
-    );
+    let mut uart1 = Uart::new_with_config(peripherals.UART1, Config::default(), &clocks, None)
+        .with_tx_rx(io.pins.gpio6, io.pins.gpio7);
 
     // Set up (LP) UART:
     let lp_tx = LowPowerOutput::new(io.pins.gpio5);

diff --git a/examples/src/bin/serial_interrupts.rs b/examples/src/bin/serial_interrupts.rs
@@ -20,7 +20,6 @@ use esp_hal::{
     system::SystemControl,
     uart::{
         config::{AtCmdConfig, Config},
-        TxRxPins,
         Uart,
     },
     Blocking,
@@ -39,7 +38,6 @@ fn main() -> ! {
     let mut uart0 = Uart::new_with_config(
         peripherals.UART0,
         Config::default(),
-        None::<TxRxPins<gpio::NoPinType, gpio::NoPinType>>,
         &clocks,
         Some(interrupt_handler),
     );

diff --git a/hil-test/tests/uart.rs b/hil-test/tests/uart.rs
@@ -20,7 +20,7 @@ use esp_hal::{
     peripherals::{Peripherals, UART0},
     prelude::*,
     system::SystemControl,
-    uart::{config::Config, ClockSource, TxRxPins, Uart},
+    uart::{config::Config, ClockSource, Uart},
     Blocking,
 };
 use nb::block;
@@ -37,15 +37,9 @@ impl Context {
         let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
 
         let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
-        let pins = TxRxPins::new_tx_rx(io.pins.gpio2, io.pins.gpio4);
-
-        let uart = Uart::new_with_config(
-            peripherals.UART0,
-            Config::default(),
-            Some(pins),
-            &clocks,
-            None,
-        );
+
+        let uart = Uart::new_with_config(peripherals.UART0, Config::default(), &clocks, None)
+            .with_tx_rx(io.pins.gpio2, io.pins.gpio4);
 
         Context { clocks, uart }
     }

diff --git a/hil-test/tests/uart_async.rs b/hil-test/tests/uart_async.rs
@@ -18,7 +18,7 @@ use esp_hal::{
     gpio::Io,
     peripherals::{Peripherals, UART0},
     system::SystemControl,
-    uart::{config::Config, TxRxPins, Uart, UartRx, UartTx},
+    uart::{config::Config, Uart, UartRx, UartTx},
     Async,
 };
 
@@ -33,10 +33,12 @@ impl Context {
         let system = SystemControl::new(peripherals.SYSTEM);
         let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
         let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
-        let pins = TxRxPins::new_tx_rx(io.pins.gpio2, io.pins.gpio4);
 
         let uart =
-            Uart::new_async_with_config(peripherals.UART0, Config::default(), Some(pins), &clocks);
+            Uart::new_async_with_config(peripherals.UART0, Config::default(), &clocks).with_tx_rx(
+                io.pins.gpio2,
+                io.pins.gpio4,
+            );
         let (tx, rx) = uart.split();
 
         Context { rx, tx }