Clean up passing clocks to drivers

esp-hal-embassy/src/lib.rs

@@ -140,12 +140,12 @@ impl<const N: usize> TimerCollection for &'static mut [Timer; N] {
 #[doc = esp_hal::before_snippet!()]
 /// use esp_hal::timg::TimerGroup;
 ///
-/// let timg0 = TimerGroup::new(peripherals.TIMG0, &clocks);
-/// esp_hal_embassy::init(&clocks, timg0.timer0);
+/// let timg0 = TimerGroup::new(peripherals.TIMG0);
+/// esp_hal_embassy::init(timg0.timer0);
 ///
 /// // ... now you can spawn embassy tasks or use `Timer::after` etc.
 /// # }
 /// ```
-pub fn init(clocks: &Clocks, time_driver: impl TimerCollection) {
-    EmbassyTimer::init(clocks, time_driver.timers())
+pub fn init(time_driver: impl TimerCollection) {
+    EmbassyTimer::init(time_driver.timers())
 }

esp-hal-embassy/src/time_driver.rs

@@ -45,7 +45,7 @@ embassy_time_driver::time_driver_impl!(static DRIVER: EmbassyTimer = EmbassyTime
 });
 
 impl EmbassyTimer {
-    pub(super) fn init(_clocks: &Clocks, timers: &'static mut [Timer]) {
+    pub(super) fn init(timers: &'static mut [Timer]) {
         if timers.len() > MAX_SUPPORTED_ALARM_COUNT {
             panic!(
                 "Maximum of {} timers can be used.",

esp-hal-smartled/src/lib.rs

@@ -12,10 +12,10 @@
 //!
 //! ```rust,ignore
 //! let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
-//! let rmt = Rmt::new(peripherals.RMT, 80.MHz(), &clocks, None).unwrap();
+//! let rmt = Rmt::new(peripherals.RMT, 80.MHz(), None).unwrap();
 //!
 //! let rmt_buffer = smartLedBuffer!(1);
-//! let mut led = SmartLedsAdapter::new(rmt.channel0, io.pins.gpio2, rmt_buffer, &clocks);
+//! let mut led = SmartLedsAdapter::new(rmt.channel0, io.pins.gpio2, rmt_buffer);
 //! ```
 //!
 //! ## Feature Flags
@@ -89,7 +89,6 @@ where
         channel: C,
         pin: impl Peripheral<P = O> + 'd,
         rmt_buffer: [u32; BUFFER_SIZE],
-        clocks: &Clocks,
     ) -> SmartLedsAdapter<TX, BUFFER_SIZE>
     where
         O: OutputPin + 'd,
@@ -107,7 +106,10 @@ where
         let channel = channel.configure(pin, config).unwrap();
 
         // Assume the RMT peripheral is set up to use the APB clock
-        let src_clock = clocks.apb_clock.to_MHz();
+        let src_clock = critical_section::with(|cs| {
+            let clocks = Clocks::get(cs);
+            clocks.apb_clock.to_MHz();
+        });
 
         Self {
             channel: Some(channel),

esp-hal/doc-helper/before

@@ -7,4 +7,4 @@
 #     loop {}
 # }
 # fn main() {
-#     let (peripherals, clocks) = esp_hal::init(Config::default());
+#     let peripherals = esp_hal::init(Config::default());

esp-hal/src/analog/adc/mod.rs

@@ -46,7 +46,7 @@
 //! );
 //! let mut adc1 = Adc::new(peripherals.ADC1, adc1_config);
 //!
-//! let mut delay = Delay::new(&clocks);
+//! let mut delay = Delay::new();
 //!
 //! loop {
 //!     let pin_value: u16 = nb::block!(adc1.read_oneshot(&mut pin)).unwrap();

esp-hal/src/analog/dac.rs

@@ -27,7 +27,7 @@
 #![cfg_attr(esp32s2, doc = "let dac1_pin = io.pins.gpio17;")]
 //! let mut dac1 = Dac::new(peripherals.DAC1, dac1_pin);
 //!
-//! let mut delay = Delay::new(&clocks);
+//! let mut delay = Delay::new();
 //!
 //! let mut voltage_dac1 = 200u8;
 //!

esp-hal/src/clock/mod.rs

@@ -48,7 +48,7 @@
 //! # }
 //! # fn main() {
 //! // Initialize with the highest possible frequency for this chip
-//! let (peripherals, clocks) = esp_hal::init({
+//! let peripherals = esp_hal::init({
 //!     let mut config = Config::default();
 //!     config.cpu_clock = CpuClock::max();
 //!     config
@@ -63,12 +63,10 @@
 #![cfg_attr(esp32h2, doc = "// let system = esp_hal::init(CpuClock::Clock96MHz);")]
 //! //
 //! // Initialize with default clock frequency for this chip
-//! // let (peripherals, clocks) = esp_hal::init(Config::default());
+//! // let peripherals = esp_hal::init(Config::default());
 //! # }
 //! ```
 
-use core::marker::PhantomData;
-
 use fugit::HertzU32;
 #[cfg(esp32c2)]
 use portable_atomic::{AtomicU32, Ordering};
@@ -271,38 +269,11 @@ impl Clock for ApbClock {
     }
 }
 
-/// Frozen clock frequencies
-///
-/// The instantiation of this type indicates that the clock configuration can no
-/// longer be changed.
-pub struct Clocks<'a> {
-    _private: PhantomData<&'a ()>,
-    rates: RawClocks,
-}
-
-impl<'a> Clocks<'a> {
-    /// This should not be used in user code.
-    /// The whole point this exists is make it possible to have other crates
-    /// (i.e. esp-wifi) create `Clocks`
-    #[doc(hidden)]
-    pub(crate) fn from_raw_clocks(raw_clocks: RawClocks) -> Clocks<'a> {
-        Self {
-            _private: PhantomData,
-            rates: raw_clocks,
-        }
-    }
-}
-
-impl core::ops::Deref for Clocks<'_> {
-    type Target = RawClocks;
-
-    fn deref(&self) -> &RawClocks {
-        &self.rates
-    }
-}
-
-/// The list of the clock frequencies that are used in the system.
-pub struct RawClocks {
+/// Clock frequencies.
+#[derive(Debug, Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[non_exhaustive]
+pub struct Clocks {
     /// CPU clock frequency
     pub cpu_clock: HertzU32,
 
@@ -357,31 +328,33 @@ cfg_if::cfg_if! {
     }
 }
 
-/// Used to configure the frequencies of the clocks present in the chip.
-///
-/// After setting all frequencies, call the freeze function to apply the
-/// configuration.
-pub struct ClockControl {
-    desired_rates: RawClocks,
-}
+use core::cell::{Ref, RefCell};
+
+use critical_section::{CriticalSection, Mutex};
 
-impl ClockControl {
-    pub(crate) fn new(clock: CpuClock) -> Self {
-        Self::configure(clock)
+static ACTIVE_CLOCKS: Mutex<RefCell<Option<Clocks>>> = Mutex::new(RefCell::new(None));
+
+impl Clocks {
+    pub(crate) fn init(cpu_clock_speed: CpuClock) {
+        critical_section::with(|cs| {
+            ACTIVE_CLOCKS
+                .borrow(cs)
+                .replace(Some(Self::configure(cpu_clock_speed)));
+        });
     }
 
-    /// Applies the clock configuration and returns a Clocks struct that
-    /// signifies that the clocks are frozen, and contains the frequencies
-    /// used. After this function is called, the clocks can not change
-    pub fn freeze(self) -> Clocks<'static> {
-        Clocks::from_raw_clocks(self.desired_rates)
+    /// Get the active clock configuration.
+    pub fn get<'a>(cs: CriticalSection<'a>) -> Ref<'a, Self> {
+        Ref::map(ACTIVE_CLOCKS.borrow_ref(cs), |active_clocks| {
+            unwrap!(active_clocks.as_ref())
+        })
     }
 }
 
 #[cfg(esp32)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         let xtal_freq = if RtcClock::estimate_xtal_frequency() > 33 {
             XtalClock::RtcXtalFreq40M
         } else {
@@ -401,25 +374,23 @@ impl ClockControl {
             clocks_ll::set_cpu_freq(cpu_clock_speed);
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: HertzU32::MHz(80),
-                xtal_clock: HertzU32::MHz(xtal_freq.mhz()),
-                i2c_clock: HertzU32::MHz(80),
-                // The docs are unclear here. pwm_clock seems to be tied to clocks.apb_clock
-                // while simultaneously being fixed at 160 MHz.
-                // Testing showed 160 MHz to be correct for current clock configurations.
-                pwm_clock: HertzU32::MHz(160),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: HertzU32::MHz(80),
+            xtal_clock: HertzU32::MHz(xtal_freq.mhz()),
+            i2c_clock: HertzU32::MHz(80),
+            // The docs are unclear here. pwm_clock seems to be tied to clocks.apb_clock
+            // while simultaneously being fixed at 160 MHz.
+            // Testing showed 160 MHz to be correct for current clock configurations.
+            pwm_clock: HertzU32::MHz(160),
         }
     }
 }
 
 #[cfg(esp32c2)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         let xtal_freq = if RtcClock::estimate_xtal_frequency() > 33 {
             XtalClock::RtcXtalFreq40M
         } else {
@@ -446,20 +417,18 @@ impl ClockControl {
             apb_freq = ApbClock::ApbFreq40MHz;
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: apb_freq.frequency(),
-                xtal_clock: xtal_freq.frequency(),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: apb_freq.frequency(),
+            xtal_clock: xtal_freq.frequency(),
         }
     }
 }
 
 #[cfg(esp32c3)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         let xtal_freq = XtalClock::RtcXtalFreq40M;
 
         let apb_freq;
@@ -480,20 +449,18 @@ impl ClockControl {
             apb_freq = ApbClock::ApbFreq80MHz;
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: apb_freq.frequency(),
-                xtal_clock: xtal_freq.frequency(),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: apb_freq.frequency(),
+            xtal_clock: xtal_freq.frequency(),
         }
     }
 }
 
 #[cfg(esp32c6)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         let xtal_freq = XtalClock::RtcXtalFreq40M;
 
         let apb_freq;
@@ -514,21 +481,19 @@ impl ClockControl {
             apb_freq = ApbClock::ApbFreq80MHz;
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: apb_freq.frequency(),
-                xtal_clock: xtal_freq.frequency(),
-                crypto_clock: HertzU32::MHz(160),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: apb_freq.frequency(),
+            xtal_clock: xtal_freq.frequency(),
+            crypto_clock: HertzU32::MHz(160),
         }
     }
 }
 
 #[cfg(esp32h2)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         let xtal_freq = XtalClock::RtcXtalFreq32M;
 
         let apb_freq;
@@ -550,51 +515,45 @@ impl ClockControl {
         }
 
         ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: apb_freq.frequency(),
-                xtal_clock: xtal_freq.frequency(),
-                pll_48m_clock: HertzU32::MHz(48),
-                crypto_clock: HertzU32::MHz(96),
-                pll_96m_clock: HertzU32::MHz(96),
-            },
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: apb_freq.frequency(),
+            xtal_clock: xtal_freq.frequency(),
+            pll_48m_clock: HertzU32::MHz(48),
+            crypto_clock: HertzU32::MHz(96),
+            pll_96m_clock: HertzU32::MHz(96),
         }
     }
 }
 
 #[cfg(esp32s2)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         if cpu_clock_speed != CpuClock::default() {
             clocks_ll::set_cpu_clock(cpu_clock_speed);
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: HertzU32::MHz(80),
-                xtal_clock: HertzU32::MHz(40),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: HertzU32::MHz(80),
+            xtal_clock: HertzU32::MHz(40),
         }
     }
 }
 
 #[cfg(esp32s3)]
-impl ClockControl {
+impl Clocks {
     /// Configure the CPU clock speed.
-    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> ClockControl {
+    pub(crate) fn configure(cpu_clock_speed: CpuClock) -> Self {
         if cpu_clock_speed != CpuClock::default() {
             clocks_ll::set_cpu_clock(cpu_clock_speed);
         }
 
-        ClockControl {
-            desired_rates: RawClocks {
-                cpu_clock: cpu_clock_speed.frequency(),
-                apb_clock: HertzU32::MHz(80),
-                xtal_clock: HertzU32::MHz(40),
-                crypto_pwm_clock: HertzU32::MHz(160),
-            },
+        Self {
+            cpu_clock: cpu_clock_speed.frequency(),
+            apb_clock: HertzU32::MHz(80),
+            xtal_clock: HertzU32::MHz(40),
+            crypto_pwm_clock: HertzU32::MHz(160),
         }
     }
 }