Add UartTx/Rx constructors

esp-rs · May 29, 2024 · c1e52a7 · c1e52a7
1 parent de3957c
commit c1e52a7
Showing 1 changed file with 53 additions and 33 deletions.
diff --git a/esp-hal/src/uart.rs b/esp-hal/src/uart.rs
@@ -344,6 +344,30 @@ where
     }
 }
 
+impl<'d, T> UartTx<'d, T, Blocking>
+where
+    T: Instance + 'd,
+{
+    /// Create a new UART TX instance in [`Blocking`] mode.
+    ///
+    /// Use [crate::gpio::NO_PIN] for the `rts` parameter if RTS is not used.
+    pub fn new<TX: OutputPin, RTS: OutputPin>(
+        _uart: impl Peripheral<P = T> + 'd,
+        tx: impl Peripheral<P = TX> + 'd,
+        rts: Option<impl Peripheral<P = RTS> + 'd>,
+    ) -> Self {
+        crate::into_ref!(tx);
+        tx.set_to_push_pull_output(crate::private::Internal);
+        tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
+        if let Some(rts) = rts {
+            crate::into_ref!(rts);
+            rts.set_to_push_pull_output(crate::private::Internal);
+            rts.connect_peripheral_to_output(T::rts_signal(), crate::private::Internal);
+        }
+        Self::new_inner()
+    }
+}
+
 impl<'d, T, M> UartRx<'d, T, M>
 where
     T: Instance,
@@ -402,6 +426,30 @@ where
     }
 }
 
+impl<'d, T> UartRx<'d, T, Blocking>
+where
+    T: Instance + 'd,
+{
+    /// Create a new UART RX instance in [`Blocking`] mode.
+    ///
+    /// Use [crate::gpio::NO_PIN] for the `cts` parameter if CTS is not used.
+    pub fn new<RX: InputPin, CTS: InputPin>(
+        _uart: impl Peripheral<P = T> + 'd,
+        rx: impl Peripheral<P = RX> + 'd,
+        cts: Option<impl Peripheral<P = CTS> + 'd>,
+    ) -> Self {
+        crate::into_ref!(rx);
+        rx.set_to_input(crate::private::Internal);
+        rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
+        if let Some(cts) = cts {
+            crate::into_ref!(cts);
+            cts.set_to_input(crate::private::Internal);
+            cts.connect_input_to_peripheral(T::cts_signal(), crate::private::Internal);
+        }
+        Self::new_inner()
+    }
+}
+
 impl<'d, T> Uart<'d, T, Blocking>
 where
     T: Instance + 'd,
@@ -438,49 +486,21 @@ where
         self
     }
 
-    /// Configure TX and RX pins
-    pub fn with_pins<TX: OutputPin, RX: InputPin, CTS: InputPin, RTS: OutputPin>(
-        self,
+    /// Create a new UART instance with defaults in [`Blocking`] mode.
+    pub fn new<TX: OutputPin, RX: InputPin>(
+        uart: impl Peripheral<P = T> + 'd,
+        clocks: &Clocks,
         tx: impl Peripheral<P = TX> + 'd,
         rx: impl Peripheral<P = RX> + 'd,
-        cts: impl Peripheral<P = CTS> + 'd,
-        rts: impl Peripheral<P = RTS> + 'd,
     ) -> Self {
         crate::into_ref!(tx);
         crate::into_ref!(rx);
-        crate::into_ref!(cts);
-        crate::into_ref!(rts);
-
-        tx.set_to_push_pull_output(crate::private::Internal);
-        tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
-
-        rx.set_to_input(crate::private::Internal);
-        rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
-
-        cts.set_to_input(crate::private::Internal);
-        cts.connect_input_to_peripheral(T::cts_signal(), crate::private::Internal);
-
-        rts.set_to_push_pull_output(crate::private::Internal);
-        rts.connect_peripheral_to_output(T::rts_signal(), crate::private::Internal);
-        self
-    }
-
-    /// Configure TX pin
-    pub fn with_tx<TX: OutputPin>(self, tx: impl Peripheral<P = TX> + 'd) -> Self {
-        crate::into_ref!(tx);
         tx.set_to_push_pull_output(crate::private::Internal);
         tx.connect_peripheral_to_output(T::tx_signal(), crate::private::Internal);
 
-        self
-    }
-
-    /// Configure RX pin
-    pub fn with_rx<RX: InputPin>(self, rx: impl Peripheral<P = RX> + 'd) -> Self {
-        crate::into_ref!(rx);
         rx.set_to_input(crate::private::Internal);
         rx.connect_input_to_peripheral(T::rx_signal(), crate::private::Internal);
-
-        self
+        Self::new_inner(uart, clocks)
     }
 
     /// Configure CTS pin