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Swap dma Channel CH and DM
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bugadani committed Nov 13, 2024
1 parent d292d11 commit daee411
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1 change: 1 addition & 0 deletions esp-hal/CHANGELOG.md
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- `I2c` SCL timeout is now defined in bus clock cycles. (#2477)
- Trying to send a single-shot RMT transmission will result in an error now, `RMT` deals with `u32` now, `PulseCode` is a convenience trait now (#2463)
- Removed `get_` prefixes from functions (#2528)
- The `Camera` and `I8080` drivers' constructors now only accepts blocking-mode DMA channels. (#2519)

### Fixed

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47 changes: 45 additions & 2 deletions esp-hal/MIGRATING-0.21.md
Original file line number Diff line number Diff line change
Expand Up @@ -276,7 +276,9 @@ For example:
}
```

## Circular DMA transfer's `available` returns `Result<usize, DmaError>` now
## DMA related changes

### Circular DMA transfer's `available` returns `Result<usize, DmaError>` now

In case of any error you should drop the transfer and restart it.

Expand All @@ -293,6 +295,22 @@ In case of any error you should drop the transfer and restart it.
+ };
```

### Channel, ChannelRx and ChannelTx types have changed

- `Channel`'s `Async`/`Blocking` mode has been moved before the channel instance parameter.
- `ChannelRx` and `ChannelTx` have gained a new `Async`/`Blocking` mode parameter.

```diff
-Channel<'d, DmaChannel0, Async>
+Channel<'d, Async, DmaChannel0>

-ChannelRx<'d, DmaChannel0>
+ChannelRx<'d, Async, DmaChannel0>

-ChannelTx<'d, DmaChannel0>
+ChannelTx<'d, Async, DmaChannel0>
```

## Removed `peripheral_input` and `into_peripheral_output` from GPIO pin types

Creating peripheral interconnect signals now consume the GPIO pin used for the connection.
Expand Down Expand Up @@ -357,7 +375,9 @@ refer to the `Config` struct as `uart::Config`.
+)
```

## I8080 driver split `set_byte_order()` into `set_8bits_order()` and `set_byte_order()`.
## LCD_CAM changes

### I8080 driver split `set_byte_order()` into `set_8bits_order()` and `set_byte_order()`.

If you were using an 8-bit bus.

Expand All @@ -371,6 +391,29 @@ If you were using an 16-bit bus, you don't need to change anything, `set_byte_or
If you were sharing the bus between an 8-bit and 16-bit device, you will have to call the corresponding method when
you switch between devices. Be sure to read the documentation of the new methods.

### Mixed mode constructors

It is no longer possible to construct `I8080` or `Camera` with an async-mode DMA channel.
Convert the DMA channel into blocking before passing it to these constructors.

```diff
let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
let channel = ctx
.dma
.channel0
- .configure(false, DmaPriority::Priority0)
- .into_async();
+ .configure(false, DmaPriority::Priority0);

let i8080 = I8080::new(
lcd_cam.lcd,
channel.tx,
pins,
20.MHz(),
Config::default(),
);
```

## `rmt::Channel::transmit` now returns `Result`, `PulseCode` is now `u32`

When trying to send a one-shot transmission will fail if it doesn't end with an end-marker.
Expand Down
12 changes: 6 additions & 6 deletions esp-hal/src/aes/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -276,21 +276,21 @@ pub mod dma {
/// The underlying [`Aes`](super::Aes) driver
pub aes: super::Aes<'d>,

channel: Channel<'d, <AES as DmaEligible>::Dma, Blocking>,
channel: Channel<'d, Blocking, <AES as DmaEligible>::Dma>,
rx_chain: DescriptorChain,
tx_chain: DescriptorChain,
}

impl<'d> crate::aes::Aes<'d> {
/// Enable DMA for the current instance of the AES driver
pub fn with_dma<C>(
pub fn with_dma<CH>(
self,
channel: Channel<'d, C, Blocking>,
channel: Channel<'d, Blocking, CH>,
rx_descriptors: &'static mut [DmaDescriptor],
tx_descriptors: &'static mut [DmaDescriptor],
) -> AesDma<'d>
where
C: DmaChannelConvert<<AES as DmaEligible>::Dma>,
CH: DmaChannelConvert<<AES as DmaEligible>::Dma>,
{
AesDma {
aes: self,
Expand Down Expand Up @@ -324,7 +324,7 @@ pub mod dma {
}

impl<'d> DmaSupportTx for AesDma<'d> {
type TX = ChannelTx<'d, <AES as DmaEligible>::Dma, Blocking>;
type TX = ChannelTx<'d, Blocking, <AES as DmaEligible>::Dma>;

fn tx(&mut self) -> &mut Self::TX {
&mut self.channel.tx
Expand All @@ -336,7 +336,7 @@ pub mod dma {
}

impl<'d> DmaSupportRx for AesDma<'d> {
type RX = ChannelRx<'d, <AES as DmaEligible>::Dma, Blocking>;
type RX = ChannelRx<'d, Blocking, <AES as DmaEligible>::Dma>;

fn rx(&mut self) -> &mut Self::RX {
&mut self.channel.rx
Expand Down
4 changes: 2 additions & 2 deletions esp-hal/src/dma/gdma.rs
Original file line number Diff line number Diff line change
Expand Up @@ -519,7 +519,7 @@ impl<C: GdmaChannel> InterruptAccess<DmaRxInterrupt> for ChannelRxImpl<C> {
#[non_exhaustive]
pub struct ChannelCreator<const N: u8> {}

impl<CH: DmaChannel, M: Mode> Channel<'_, CH, M> {
impl<CH: DmaChannel, M: Mode> Channel<'_, M, CH> {
/// Asserts that the channel is compatible with the given peripheral.
pub fn runtime_ensure_compatible<P: DmaEligible>(&self, _peripheral: &PeripheralRef<'_, P>) {
// No runtime checks; GDMA channels are compatible with any peripheral
Expand Down Expand Up @@ -583,7 +583,7 @@ macro_rules! impl_channel {
self,
burst_mode: bool,
priority: DmaPriority,
) -> Channel<'a, [<DmaChannel $num>], Blocking> {
) -> Channel<'a, Blocking, [<DmaChannel $num>]> {
let mut this = Channel {
tx: ChannelTx::new(ChannelTxImpl(SpecificGdmaChannel::<$num> {})),
rx: ChannelRx::new(ChannelRxImpl(SpecificGdmaChannel::<$num> {})),
Expand Down
18 changes: 9 additions & 9 deletions esp-hal/src/dma/m2m.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ pub struct Mem2Mem<'d, M>
where
M: Mode,
{
channel: Channel<'d, AnyGdmaChannel, M>,
channel: Channel<'d, M, AnyGdmaChannel>,
rx_chain: DescriptorChain,
tx_chain: DescriptorChain,
peripheral: DmaPeripheral,
Expand All @@ -41,15 +41,15 @@ where
impl<'d> Mem2Mem<'d, Blocking> {
/// Create a new Mem2Mem instance.
pub fn new<CH, DM>(
channel: Channel<'d, CH, DM>,
channel: Channel<'d, DM, CH>,
peripheral: impl DmaEligible,
rx_descriptors: &'static mut [DmaDescriptor],
tx_descriptors: &'static mut [DmaDescriptor],
) -> Result<Self, DmaError>
where
CH: DmaChannelConvert<AnyGdmaChannel>,
DM: Mode,
Channel<'d, CH, Blocking>: From<Channel<'d, CH, DM>>,
Channel<'d, Blocking, CH>: From<Channel<'d, DM, CH>>,
{
unsafe {
Self::new_unsafe(
Expand All @@ -64,7 +64,7 @@ impl<'d> Mem2Mem<'d, Blocking> {

/// Create a new Mem2Mem instance with specific chunk size.
pub fn new_with_chunk_size<CH, DM>(
channel: Channel<'d, CH, DM>,
channel: Channel<'d, DM, CH>,
peripheral: impl DmaEligible,
rx_descriptors: &'static mut [DmaDescriptor],
tx_descriptors: &'static mut [DmaDescriptor],
Expand All @@ -73,7 +73,7 @@ impl<'d> Mem2Mem<'d, Blocking> {
where
CH: DmaChannelConvert<AnyGdmaChannel>,
DM: Mode,
Channel<'d, CH, Blocking>: From<Channel<'d, CH, DM>>,
Channel<'d, Blocking, CH>: From<Channel<'d, DM, CH>>,
{
unsafe {
Self::new_unsafe(
Expand All @@ -93,7 +93,7 @@ impl<'d> Mem2Mem<'d, Blocking> {
/// You must ensure that your not using DMA for the same peripheral and
/// that your the only one using the DmaPeripheral.
pub unsafe fn new_unsafe<CH, DM>(
channel: Channel<'d, CH, DM>,
channel: Channel<'d, DM, CH>,
peripheral: DmaPeripheral,
rx_descriptors: &'static mut [DmaDescriptor],
tx_descriptors: &'static mut [DmaDescriptor],
Expand All @@ -102,7 +102,7 @@ impl<'d> Mem2Mem<'d, Blocking> {
where
CH: DmaChannelConvert<AnyGdmaChannel>,
DM: Mode,
Channel<'d, CH, Blocking>: From<Channel<'d, CH, DM>>,
Channel<'d, Blocking, CH>: From<Channel<'d, DM, CH>>,
{
if !(1..=4092).contains(&chunk_size) {
return Err(DmaError::InvalidChunkSize);
Expand All @@ -111,7 +111,7 @@ impl<'d> Mem2Mem<'d, Blocking> {
return Err(DmaError::OutOfDescriptors);
}
Ok(Mem2Mem {
channel: Channel::<_, Blocking>::from(channel).degrade(),
channel: Channel::<Blocking, _>::from(channel).degrade(),
peripheral,
rx_chain: DescriptorChain::new_with_chunk_size(rx_descriptors, chunk_size),
tx_chain: DescriptorChain::new_with_chunk_size(tx_descriptors, chunk_size),
Expand Down Expand Up @@ -194,7 +194,7 @@ impl<'d, M> DmaSupportRx for Mem2Mem<'d, M>
where
M: Mode,
{
type RX = ChannelRx<'d, AnyGdmaChannel, M>;
type RX = ChannelRx<'d, M, AnyGdmaChannel>;

fn rx(&mut self) -> &mut Self::RX {
&mut self.channel.rx
Expand Down
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