Add UART wakeup source

[bjoernQ]

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Submission Checklist 📝

• I have updated existing examples or added new ones (if applicable).
• I have used cargo xtask fmt-packages command to ensure that all changed code is formatted correctly.
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Pull Request Details 📖

Description

This adds uart as a wake-up source. Like with #1724 this adds it for all chips but anything besides ESP32-C6 currently seems to have light-sleep issues.

Starting with C6 there are more ways to configure UART-wake-up but those additional options didn't "just work" for me and they are apparently not available in ESP-IDF - so let's keep that for later when we can see what is really needed to make them work.

Testing

Use this example

//! Demonstrates light sleep with uart wake-up

//% CHIPS: esp32 esp32c3 esp32c6 esp32s3

#![no_std]
#![no_main]

use core::fmt::Write;

use esp_backtrace as _;
use esp_hal::{
    clock::ClockControl,
    delay::Delay,
    entry,
    gpio::Io,
    peripherals::Peripherals,
    rtc_cntl::{get_reset_reason, get_wakeup_cause, sleep::Uart0WakeupSource, Rtc, SocResetReason},
    system::SystemControl,
    uart::Uart,
    Cpu,
};

#[entry]
fn main() -> ! {
    let peripherals = Peripherals::take();
    let system = SystemControl::new(peripherals.SYSTEM);
    let clocks = ClockControl::boot_defaults(system.clock_control).freeze();

    let mut delay = Delay::new(&clocks);
    let mut rtc = Rtc::new(peripherals.LPWR, None);

    let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);

    // Default pins for Uart/Serial communication
    #[cfg(feature = "esp32")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio1, io.pins.gpio3);
    #[cfg(feature = "esp32c2")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio20, io.pins.gpio19);
    #[cfg(feature = "esp32c3")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio21, io.pins.gpio20);
    #[cfg(feature = "esp32c6")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio16, io.pins.gpio17);
    #[cfg(feature = "esp32h2")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio24, io.pins.gpio23);
    #[cfg(feature = "esp32s2")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio43, io.pins.gpio44);
    #[cfg(feature = "esp32s3")]
    let (mut tx_pin, mut rx_pin) = (io.pins.gpio43, io.pins.gpio44);

    let mut uart0 =
        Uart::new_with_default_pins(peripherals.UART0, &clocks, &mut tx_pin, &mut rx_pin).unwrap();

    writeln!(uart0, "up and runnning!").ok();
    let reason = get_reset_reason(Cpu::ProCpu).unwrap_or(SocResetReason::ChipPowerOn);
    writeln!(uart0, "reset reason: {:?}", reason).ok();
    let wake_reason = get_wakeup_cause();
    writeln!(uart0, "wake reason: {:?}", wake_reason).ok();

    loop {
        let gpio_wakeup = Uart0WakeupSource::new(9);
        writeln!(uart0, "sleeping!").ok();
        rtc.sleep_light(&[&gpio_wakeup], &mut delay);

        writeln!(uart0, "welcome back!!!!!").ok();
        delay.delay_millis(250);
        for _ in 0..10 {
            let res = uart0.read_byte();
            writeln!(uart0, "{:?}", res).ok();
        }
    }
}

[bjoernQ]

I think in this case a panic gets much less into user's ways than having to check a Result which might just gets unwrapped

[bjoernQ]

could have implemented some trait on the UARTs and have generics but I think in this very simple case a macro is not a bad way to do it

[SergioGasquez]

LGTM! Could/should we add a small test for this (just like the testing example that you provided)?

[bjoernQ]

LGTM! Could/should we add a small test for this (just like the testing example that you provided)?

Ideally having the whole sleep stuff covered by HIL testing would be great, I think. Not sure if adding more examples is a good idea since we already have a couple of (somewhat redundant) sleep examples 🤔

While we cannot really test most wake-up sources with the current setup, at least a simple test for light-sleep with a timer wake-up should be possible (hopefully - no sure how probe-rs will like the chip getting to sleep). Will try to add that and maybe create a separate PR 👍

[bjoernQ]

mhhh - not unexpectedly probe-rs doesn't like a sleeping chip 😞

[jessebraham]

LGTM! If you could just rebase please it this should be good to merge.