Enable I2S tests on ESP32 and work around first sample issue #2194
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Before, note that WS starts from low and corresponds to 18 instead of 16 clock pulses. Also note the order or halfwords (we generate 00, 05, 0A, 0F, 14, ... bytes, or 0500, 0F0A, 1914, ... halfwords)
After, notice the 2 clock pulses before WS goes high:
As a comparison, the following capture is from an S3, demonstrating that we're outputting data a) to the same channel and b) we output channels in the flipped order.