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Merge branch 'feature/support_gdma_retention_v5.1' into 'release/v5.1'
feature: support gdma retention in pd_top lightsleep (v5.1) See merge request espressif/esp-idf!29089
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/* | ||
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include <stdlib.h> | ||
#include <string.h> | ||
#include "sdkconfig.h" | ||
#include "soc/soc_caps.h" | ||
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#include "esp_err.h" | ||
#include "esp_check.h" | ||
#include "esp_log.h" | ||
#include "esp_private/sleep_retention.h" | ||
#include "esp_private/esp_regdma.h" | ||
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#include "sleep_gdma_retention_context.inc" | ||
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static const char *TAG = "gdma"; | ||
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#define SLEEP_RETENTION_MODULE_GDMA_CH(group_id, pair_id) (SLEEP_RETENTION_MODULE_GDMA_CH0 << (SOC_GDMA_PAIRS_PER_GROUP * group_id) << pair_id) | ||
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static esp_err_t sleep_modem_gdma_channel_retention_init(sleep_retention_module_bitmap_t module) | ||
{ | ||
uint32_t id = __builtin_ctz(module / SLEEP_RETENTION_MODULE_GDMA_CH0); | ||
esp_err_t err = sleep_retention_entries_create(gdma_chx_regs_retention[id].link_list, gdma_chx_regs_retention[id].link_num, REGDMA_LINK_PRI_7, module); | ||
if (err == ESP_OK) { | ||
int group_id = id / SOC_GDMA_PAIRS_PER_GROUP; | ||
int pair_id = id % SOC_GDMA_PAIRS_PER_GROUP; | ||
ESP_LOGI(TAG, "GDMA pair (%d, %d) retention initialization", group_id, pair_id); | ||
} | ||
return err; | ||
} | ||
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esp_err_t gdma_sleep_retention_init(int group_id, int pair_id) | ||
{ | ||
esp_err_t err = ESP_OK; | ||
err = sleep_modem_gdma_channel_retention_init(SLEEP_RETENTION_MODULE_GDMA_CH(group_id, pair_id)); | ||
ESP_RETURN_ON_ERROR(err, TAG, "Failed to create sleep retention linked list for GDMA pair (%d, %d) retention", group_id, pair_id); | ||
return err; | ||
} | ||
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esp_err_t gdma_sleep_retention_deinit(int group_id, int pair_id) | ||
{ | ||
sleep_retention_entries_destroy(SLEEP_RETENTION_MODULE_GDMA_CH(group_id, pair_id)); | ||
return ESP_OK;; | ||
} |
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40 changes: 40 additions & 0 deletions
40
components/esp_hw_support/include/esp_private/gdma_sleep_retention.h
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/* | ||
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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// DO NOT USE THESE APIS IN ANY APPLICATIONS | ||
// GDMA driver is not public for end users, but for ESP-IDF developers. | ||
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#pragma once | ||
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#include "esp_err.h" | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
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/** | ||
* Initialize GDMA channel retention link for powerdown the TOP powerdomain during lightsleep | ||
* @param group_id Group id | ||
* @param pair_id Pair id | ||
* @return | ||
* - ESP_OK: Create DMA retention link successfully | ||
* - ESP_ERR_NO_MEM: Create DMA retention link failed because out of memory | ||
*/ | ||
esp_err_t gdma_sleep_retention_init(int group_id, int pair_id); | ||
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/** | ||
* Destroy GDMA channel retention link | ||
* @param group_id Group id | ||
* @param pair_id Pair id | ||
* @return always return ESP_OK | ||
*/ | ||
esp_err_t gdma_sleep_retention_deinit(int group_id, int pair_id); | ||
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#ifdef __cplusplus | ||
} | ||
#endif |
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81 changes: 81 additions & 0 deletions
81
components/esp_hw_support/port/esp32c6/private_include/sleep_gdma_retention_context.inc
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/* | ||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include "soc/soc_caps.h" | ||
#include "soc/gdma_reg.h" | ||
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/* GDMA Channel (Group0, Pair0) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH0_REG / GDMA_OUT_INT_ENA_CH0_REG / GDMA_IN_PERI_SEL_CH0_REG / GDMA_OUT_PERI_SEL_CH0_REG | ||
GDMA_IN_CONF0_CH0_REG / GDMA_IN_CONF1_CH0_REG / GDMA_IN_LINK_CH0_REG / GDMA_IN_PRI_CH0_REG | ||
GDMA_OUT_CONF0_CH0_REG / GDMA_OUT_CONF1_CH0_REG / GDMA_OUT_LINK_CH0_REG /GDMA_OUT_PRI_CH0_REG | ||
*/ | ||
#define G0P0_RETENTION_REGS_CNT 13 | ||
#define G0P0_RETENTION_MAP_BASE GDMA_IN_INT_ENA_CH0_REG | ||
static const uint32_t g0p0_regs_map[4] = {0x4C801001, 0x604C0060, 0, 0}; | ||
static const sleep_retention_entries_config_t gdma_g0p0_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P0_RETENTION_MAP_BASE, G0P0_RETENTION_MAP_BASE, \ | ||
G0P0_RETENTION_REGS_CNT, 0, 0, \ | ||
g0p0_regs_map[0], g0p0_regs_map[1], \ | ||
g0p0_regs_map[2], g0p0_regs_map[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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/* GDMA Channel (Group0, Pair1) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH1_REG / GDMA_OUT_INT_ENA_CH1_REG / GDMA_IN_PERI_SEL_CH1_REG / GDMA_OUT_PERI_SEL_CH1_REG | ||
GDMA_IN_CONF0_CH1_REG / GDMA_IN_CONF1_CH1_REG / GDMA_IN_LINK_CH1_REG / GDMA_IN_PRI_CH1_REG | ||
GDMA_OUT_CONF0_CH1_REG / GDMA_OUT_CONF1_CH1_REG / GDMA_OUT_LINK_CH1_REG /GDMA_OUT_PRI_CH1_REG | ||
*/ | ||
#define G0P1_RETENTION_REGS_CNT 13 | ||
#define G0P1_RETENTION_MAP_BASE GDMA_IN_INT_ENA_CH1_REG | ||
static const uint32_t g0p1_regs_map[4] = {0x81001, 0, 0xC00604C0, 0x604}; | ||
static const sleep_retention_entries_config_t gdma_g0p1_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P1_RETENTION_MAP_BASE, G0P1_RETENTION_MAP_BASE, \ | ||
G0P1_RETENTION_REGS_CNT, 0, 0, \ | ||
g0p1_regs_map[0], g0p1_regs_map[1], \ | ||
g0p1_regs_map[2], g0p1_regs_map[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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/* GDMA Channel (Group0, Pair2) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH2_REG / GDMA_OUT_INT_ENA_CH2_REG / GDMA_IN_PERI_SEL_CH2_REG / GDMA_OUT_PERI_SEL_CH2_REG | ||
GDMA_IN_CONF0_CH2_REG / GDMA_IN_CONF1_CH2_REG / GDMA_IN_LINK_CH2_REG / GDMA_IN_PRI_CH2_REG | ||
GDMA_OUT_CONF0_CH2_REG / GDMA_OUT_CONF1_CH2_REG / GDMA_OUT_LINK_CH2_REG /GDMA_OUT_PRI_CH2_REG | ||
*/ | ||
#define G0P2_RETENTION_REGS_CNT_0 6 | ||
#define G0P2_RETENTION_MAP_BASE_0 GDMA_IN_INT_ENA_CH2_REG | ||
#define G0P2_RETENTION_REGS_CNT_1 7 | ||
#define G0P2_RETENTION_MAP_BASE_1 GDMA_IN_PRI_CH2_REG | ||
static const uint32_t g0p2_regs_map0[4] = {0x9001, 0, 0, 0x4C0000}; | ||
static const uint32_t g0p2_regs_map1[4] = {0x3026003, 0, 0, 0}; | ||
static const sleep_retention_entries_config_t gdma_g0p2_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P2_RETENTION_MAP_BASE_0, G0P2_RETENTION_MAP_BASE_0, \ | ||
G0P2_RETENTION_REGS_CNT_0, 0, 0, \ | ||
g0p2_regs_map0[0], g0p2_regs_map0[1], \ | ||
g0p2_regs_map0[2], g0p2_regs_map0[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
[1] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P2_RETENTION_MAP_BASE_1, G0P2_RETENTION_MAP_BASE_1, \ | ||
G0P2_RETENTION_REGS_CNT_1, 0, 0, \ | ||
g0p2_regs_map1[0], g0p2_regs_map1[1], \ | ||
g0p2_regs_map1[2], g0p2_regs_map1[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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static const struct { | ||
const sleep_retention_entries_config_t *link_list; | ||
uint32_t link_num; | ||
} gdma_chx_regs_retention[SOC_GDMA_PAIRS_PER_GROUP*SOC_GDMA_PAIRS_PER_GROUP] = { | ||
[0] = {gdma_g0p0_regs_retention, ARRAY_SIZE(gdma_g0p0_regs_retention)}, | ||
[1] = {gdma_g0p1_regs_retention, ARRAY_SIZE(gdma_g0p1_regs_retention)}, | ||
[2] = {gdma_g0p2_regs_retention, ARRAY_SIZE(gdma_g0p2_regs_retention)} | ||
}; |
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81
components/esp_hw_support/port/esp32h2/private_include/sleep_gdma_retention_context.inc
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/* | ||
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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#include "soc/soc_caps.h" | ||
#include "soc/gdma_reg.h" | ||
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/* GDMA Channel (Group0, Pair0) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH0_REG / GDMA_OUT_INT_ENA_CH0_REG / GDMA_IN_PERI_SEL_CH0_REG / GDMA_OUT_PERI_SEL_CH0_REG | ||
GDMA_IN_CONF0_CH0_REG / GDMA_IN_CONF1_CH0_REG / GDMA_IN_LINK_CH0_REG / GDMA_IN_PRI_CH0_REG | ||
GDMA_OUT_CONF0_CH0_REG / GDMA_OUT_CONF1_CH0_REG / GDMA_OUT_LINK_CH0_REG /GDMA_OUT_PRI_CH0_REG | ||
*/ | ||
#define G0P0_RETENTION_REGS_CNT 13 | ||
#define G0P0_RETENTION_MAP_BASE GDMA_IN_INT_ENA_CH0_REG | ||
static const uint32_t g0p0_regs_map[4] = {0x4C801001, 0x604C0060, 0, 0}; | ||
static const sleep_retention_entries_config_t gdma_g0p0_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P0_RETENTION_MAP_BASE, G0P0_RETENTION_MAP_BASE, \ | ||
G0P0_RETENTION_REGS_CNT, 0, 0, \ | ||
g0p0_regs_map[0], g0p0_regs_map[1], \ | ||
g0p0_regs_map[2], g0p0_regs_map[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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/* GDMA Channel (Group0, Pair1) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH1_REG / GDMA_OUT_INT_ENA_CH1_REG / GDMA_IN_PERI_SEL_CH1_REG / GDMA_OUT_PERI_SEL_CH1_REG | ||
GDMA_IN_CONF0_CH1_REG / GDMA_IN_CONF1_CH1_REG / GDMA_IN_LINK_CH1_REG / GDMA_IN_PRI_CH1_REG | ||
GDMA_OUT_CONF0_CH1_REG / GDMA_OUT_CONF1_CH1_REG / GDMA_OUT_LINK_CH1_REG /GDMA_OUT_PRI_CH1_REG | ||
*/ | ||
#define G0P1_RETENTION_REGS_CNT 13 | ||
#define G0P1_RETENTION_MAP_BASE GDMA_IN_INT_ENA_CH1_REG | ||
static const uint32_t g0p1_regs_map[4] = {0x81001, 0, 0xC00604C0, 0x604}; | ||
static const sleep_retention_entries_config_t gdma_g0p1_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P1_RETENTION_MAP_BASE, G0P1_RETENTION_MAP_BASE, \ | ||
G0P1_RETENTION_REGS_CNT, 0, 0, \ | ||
g0p1_regs_map[0], g0p1_regs_map[1], \ | ||
g0p1_regs_map[2], g0p1_regs_map[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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/* GDMA Channel (Group0, Pair2) Registers Context | ||
Include: GDMA_MISC_CONF_REG / | ||
GDMA_IN_INT_ENA_CH2_REG / GDMA_OUT_INT_ENA_CH2_REG / GDMA_IN_PERI_SEL_CH2_REG / GDMA_OUT_PERI_SEL_CH2_REG | ||
GDMA_IN_CONF0_CH2_REG / GDMA_IN_CONF1_CH2_REG / GDMA_IN_LINK_CH2_REG / GDMA_IN_PRI_CH2_REG | ||
GDMA_OUT_CONF0_CH2_REG / GDMA_OUT_CONF1_CH2_REG / GDMA_OUT_LINK_CH2_REG /GDMA_OUT_PRI_CH2_REG | ||
*/ | ||
#define G0P2_RETENTION_REGS_CNT_0 6 | ||
#define G0P2_RETENTION_MAP_BASE_0 GDMA_IN_INT_ENA_CH2_REG | ||
#define G0P2_RETENTION_REGS_CNT_1 7 | ||
#define G0P2_RETENTION_MAP_BASE_1 GDMA_IN_PRI_CH2_REG | ||
static const uint32_t g0p2_regs_map0[4] = {0x9001, 0, 0, 0x4C0000}; | ||
static const uint32_t g0p2_regs_map1[4] = {0x3026003, 0, 0, 0}; | ||
static const sleep_retention_entries_config_t gdma_g0p2_regs_retention[] = { | ||
[0] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P2_RETENTION_MAP_BASE_0, G0P2_RETENTION_MAP_BASE_0, \ | ||
G0P2_RETENTION_REGS_CNT_0, 0, 0, \ | ||
g0p2_regs_map0[0], g0p2_regs_map0[1], \ | ||
g0p2_regs_map0[2], g0p2_regs_map0[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
[1] = { .config = REGDMA_LINK_ADDR_MAP_INIT(REGDMA_MODEM_GDMA_LINK(0x00), \ | ||
G0P2_RETENTION_MAP_BASE_1, G0P2_RETENTION_MAP_BASE_1, \ | ||
G0P2_RETENTION_REGS_CNT_1, 0, 0, \ | ||
g0p2_regs_map1[0], g0p2_regs_map1[1], \ | ||
g0p2_regs_map1[2], g0p2_regs_map1[3]), \ | ||
.owner = ENTRY(0) | ENTRY(2) }, | ||
}; | ||
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static const struct { | ||
const sleep_retention_entries_config_t *link_list; | ||
uint32_t link_num; | ||
} gdma_chx_regs_retention[SOC_GDMA_PAIRS_PER_GROUP*SOC_GDMA_PAIRS_PER_GROUP] = { | ||
[0] = {gdma_g0p0_regs_retention, ARRAY_SIZE(gdma_g0p0_regs_retention)}, | ||
[1] = {gdma_g0p1_regs_retention, ARRAY_SIZE(gdma_g0p1_regs_retention)}, | ||
[2] = {gdma_g0p2_regs_retention, ARRAY_SIZE(gdma_g0p2_regs_retention)} | ||
}; |
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@@ -143,7 +143,6 @@ Light-sleep 外设下电 | |
- SYSTIMER | ||
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以下外设尚未支持: | ||
- GDMA | ||
- ETM | ||
- TIMG1 | ||
- ASSIST_DEBUG | ||
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