Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

ETS_UNCACHED_ADDR redefined between rtc_io_reg.h and soc.h (IDFGH-10922) #12116

Closed
3 tasks done
amrsoll opened this issue Aug 22, 2023 · 2 comments
Closed
3 tasks done
Assignees
Labels
Resolution: NA Issue resolution is unavailable Status: Done Issue is done internally Type: Bug bugs in IDF

Comments

@amrsoll
Copy link

amrsoll commented Aug 22, 2023

Answers checklist.

  • I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
  • I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
  • I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

v5.1 AND master commit: 3247253

Operating System used.

Linux

How did you build your project?

Command line with idf.py

If you are using Windows, please specify command line type.

None

What is the expected behavior?

Target: esp32s3

The permutation of these 2 include statements should be equivalent.

ulp/ulp_main_A.c

#include "ulp_riscv_gpio.h"
#include "ulp_riscv_utils.h"

int main(void) { 
  ulp_riscv_gpio_output_level(GPIO_NUM_2, 0);
  return 0;
}

ulp/ulp_main_B.c

#include "ulp_riscv_utils.h"
#include "ulp_riscv_gpio.h"

int main(void) {
  ulp_riscv_gpio_output_level(GPIO_NUM_2, 0);
  return 0;
}

What is the actual behavior?

at build time, some redefinition warnings are triggered.

ulp/ulp_main_B.c No warnings

ulp/ulp_main_A.c Causes compilation warning

[...]
[1/5] Building C object CMakeFiles/ulp_main.dir/mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c.obj
In file included from /mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_utils.h:15,
                 from /mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c:6:
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:29: warning: "ETS_UNCACHED_ADDR" redefined
   29 | #define ETS_UNCACHED_ADDR(addr)     (RISCV_REG_CONV(addr))
      | 
In file included from /mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/rtc_io_reg.h:18,
                 from /mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h:13,
                 from /mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c:5:
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:44: note: this is the location of the previous definition
   44 | #define ETS_UNCACHED_ADDR(addr) (addr)
      | 
[...]

Steps to reproduce.

  1. idf.py build using the example ULP code.

Build or installation Logs.

Build logs

Executing action: all (aliases: build)
Running ninja in directory /mnt/develdata/home/axel/Spear/build
Executing "ninja all"...
[1/14] Performing build step for 'bootloader'
[1/1] cd /mnt/develdata/home/axel/Spear/build/bootloader/esp-idf/esptool_py && /home/axel/.espressif/python_env/idf5.2_py3.11_env/bin/python /mnt/develdata/home/axel/esp/esp-idf/components/partition_table/check_sizes.py --offset 0x8000 bootloader 0x0 /mnt/develdata/home/axel/Spear/build/bootloader/bootloader.bin
Bootloader binary size 0x52d0 bytes. 0x2d30 bytes (35%) free.
[2/14] No install step for 'bootloader'
[3/14] Completed 'bootloader'
[4/14] Performing build step for 'ulp_main'
[1/5] Building C object CMakeFiles/ulp_main.dir/mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c.obj
In file included from /mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_utils.h:15,
                 from /mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c:6:
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:29: warning: "ETS_UNCACHED_ADDR" redefined
   29 | #define ETS_UNCACHED_ADDR(addr)     (RISCV_REG_CONV(addr))
      | 
In file included from /mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/rtc_io_reg.h:18,
                 from /mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_gpio.h:13,
                 from /mnt/develdata/home/axel/Spear/main/ulp/ulp_main.c:5:
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:44: note: this is the location of the previous definition
   44 | #define ETS_UNCACHED_ADDR(addr) (addr)
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:38: warning: "REG_WRITE" redefined
   38 | #define REG_WRITE(_r, _v) ({                                                                                           \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:50: note: this is the location of the previous definition
   50 | #define REG_WRITE(_r, _v)  do {                                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:43: warning: "REG_READ" redefined
   43 | #define REG_READ(_r) ({                                                                                                \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:55: note: this is the location of the previous definition
   55 | #define REG_READ(_r) ({                                                                                                \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:48: warning: "REG_GET_BIT" redefined
   48 | #define REG_GET_BIT(_r, _b)  ({                                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:60: note: this is the location of the previous definition
   60 | #define REG_GET_BIT(_r, _b)  ({                                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:53: warning: "REG_SET_BIT" redefined
   53 | #define REG_SET_BIT(_r, _b)  ({                                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:65: note: this is the location of the previous definition
   65 | #define REG_SET_BIT(_r, _b)  do {                                                                                      \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:58: warning: "REG_CLR_BIT" redefined
   58 | #define REG_CLR_BIT(_r, _b)  ({                                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:70: note: this is the location of the previous definition
   70 | #define REG_CLR_BIT(_r, _b)  do {                                                                                      \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:63: warning: "REG_SET_BITS" redefined
   63 | #define REG_SET_BITS(_r, _b, _m) ({                                                                                    \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:75: note: this is the location of the previous definition
   75 | #define REG_SET_BITS(_r, _b, _m) do {                                                                                  \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:73: warning: "REG_SET_FIELD" redefined
   73 | #define REG_SET_FIELD(_r, _f, _v) ({                                                                                   \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:85: note: this is the location of the previous definition
   85 | #define REG_SET_FIELD(_r, _f, _v) do {                                                                                 \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:101: warning: "WRITE_PERI_REG" redefined
  101 | #define WRITE_PERI_REG(addr, val) ({                                                                                   \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:113: note: this is the location of the previous definition
  113 | #define WRITE_PERI_REG(addr, val) do {                                                                                 \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:106: warning: "CLEAR_PERI_REG_MASK" redefined
  106 | #define CLEAR_PERI_REG_MASK(reg, mask) ({                                                                              \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:118: note: this is the location of the previous definition
  118 | #define CLEAR_PERI_REG_MASK(reg, mask)  do {                                                                           \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:111: warning: "SET_PERI_REG_MASK" redefined
  111 | #define SET_PERI_REG_MASK(reg, mask) ({                                                                                \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:123: note: this is the location of the previous definition
  123 | #define SET_PERI_REG_MASK(reg, mask) do {                                                                              \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:125: warning: "GET_PERI_REG_BITS" redefined
  125 | #define GET_PERI_REG_BITS(reg, bit_map, shift)    ((READ_PERI_REG(reg))&((bit_map)<<(shift)))>>shift
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:133: note: this is the location of the previous definition
  133 | #define GET_PERI_REG_BITS(reg, hipos,lowpos) ({                                                                        \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h:128: warning: "SET_PERI_REG_BITS" redefined
  128 | #define SET_PERI_REG_BITS(reg,bit_map,value,shift) ({                                                                  \
      | 
/mnt/develdata/home/axel/esp/esp-idf/components/soc/esp32s3/include/soc/soc.h:138: note: this is the location of the previous definition
  138 | #define SET_PERI_REG_BITS(reg,bit_map,value,shift) do {                                                                \
      | 
[2/5] Linking C executable ulp_main.elf
[3/5] Generating ulp_main.bin
[4/5] Generating ulp_main.sym
[5/5] Generating ulp_main.ld, ulp_main.h
[5/14] No install step for 'ulp_main'
[6/14] Completed 'ulp_main'

More Information.

The header file esp32s3/include/soc/soc.h:39 checks against ULP_RISCV_REGISTER_OPS

//Convenient way to replace the register ops when ulp riscv projects
//consume this file
#ifndef ULP_RISCV_REGISTER_OPS

//Registers Operation {{
#define ETS_UNCACHED_ADDR(addr) (addr)
#define ETS_CACHED_ADDR(addr) (addr)

Which is defined in components/ulp/ulp_riscv/ulp_core/include/ulp_riscv_register_ops.h

// [...]
#pragma once
#define ULP_RISCV_REGISTER_OPS

// [...]

/*
 * When COCPU accesses the RTC register, it needs to convert the access address.
 * When COCPU accesses the RTC memory, dont need to convert the access address.
 */
#define RISCV_REG_CONV(addr)        (((addr&0xffff)<<3 & 0xe000) | (addr & 0x1fff) | 0x8000)
#define ETS_UNCACHED_ADDR(addr)     (RISCV_REG_CONV(addr))
// [...]

Given the change of definition of ETS_UNCACHED_ADDR(addr) this warning should either be an error (preferably explaining that you need to include ulp_riscv_utils.h first) or there shouldn't be 2 definitions for ETS_UNCACHED_ADDR. Same goes for a lot of the other macros in both files.

@amrsoll amrsoll added the Type: Bug bugs in IDF label Aug 22, 2023
@espressif-bot espressif-bot added the Status: Opened Issue is new label Aug 22, 2023
@github-actions github-actions bot changed the title ETS_UNCACHED_ADDR redefined between rtc_io_reg.h and soc.h ETS_UNCACHED_ADDR redefined between rtc_io_reg.h and soc.h (IDFGH-10922) Aug 22, 2023
@espressif-bot espressif-bot added Status: Selected for Development Issue is selected for development and removed Status: Opened Issue is new labels Aug 23, 2023
@sudeep-mohanty
Copy link
Collaborator

Thanks for bringing this to our notice @amrsoll. Yes indeed this should be handled in a better way such that the order of inclusion of the headers should not matter. We will work on adding a fix.

@espressif-bot espressif-bot added Status: In Progress Work is in progress and removed Status: Selected for Development Issue is selected for development labels Aug 23, 2023
@amrsoll
Copy link
Author

amrsoll commented Aug 23, 2023

Thank you for taking care of it :)

@espressif-bot espressif-bot added Status: Done Issue is done internally Resolution: NA Issue resolution is unavailable and removed Status: In Progress Work is in progress labels Aug 29, 2023
CommanderRedYT pushed a commit to CommanderRedYT/esp-idf that referenced this issue Sep 24, 2023
…egister_ops.h

There are redefinition compilation warnings for the register operation
macros when a ULP program was compiled which included soc.h before
ulp_riscv_register_ops.h. This commit fixes the issues by delegating the
exclusion macro to the CMakeLists.txt file.

Closes: espressif#12116
espressif-bot pushed a commit that referenced this issue Sep 12, 2024
…egister_ops.h

There are redefinition compilation warnings for the register operation
macros when a ULP program was compiled which included soc.h before
ulp_riscv_register_ops.h. This commit fixes the issues by delegating the
exclusion macro to the CMakeLists.txt file.

Closes: #12116
Closes: #14438
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
Resolution: NA Issue resolution is unavailable Status: Done Issue is done internally Type: Bug bugs in IDF
Projects
None yet
Development

No branches or pull requests

3 participants