docs: Add ESP32-C5 and ESP32-C61 docs

espressif · Oct 3, 2024 · f52c723 · f52c723
1 parent ec309bb
commit f52c723
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Showing 10 changed files with 393 additions and 10 deletions.
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
@@ -433,7 +433,7 @@ target_esp32c61:
   tags:
     - esptool_esp32c61_target
   script:
-    - coverage run --parallel-mode -m pytest ${CI_PROJECT_DIR}/test/test_esptool.py --port /dev/serial_ports/ESP32C61 --chip esp32c61 --baud 115200    
+    - coverage run --parallel-mode -m pytest ${CI_PROJECT_DIR}/test/test_esptool.py --port /dev/serial_ports/ESP32C61 --chip esp32c61 --baud 115200
 
 .windows_test:
   stage: test
@@ -523,7 +523,7 @@ build_docs:
   script:
     - cd docs
     - pip install -r requirements.txt --prefer-binary
-    - build-docs -l en -t {esp8266,esp32,esp32s2,esp32c3,esp32s3,esp32c2,esp32c6,esp32h2,esp32p4}
+    - build-docs -l en -t {esp8266,esp32,esp32s2,esp32c3,esp32s3,esp32c2,esp32c6,esp32h2,esp32p4,esp32c5,esp32c61}
 
 .deploy_docs_template:
   stage: deploy_docs

diff --git a/docs/_static/esptool_versions.js b/docs/_static/esptool_versions.js
@@ -13,5 +13,7 @@ var DOCUMENTATION_VERSIONS = {
        { text: "ESP32-C6", value: "esp32c6" },
        { text: "ESP32-H2", value: "esp32h2" },
        { text: "ESP32-P4", value: "esp32p4" },
+       { text: "ESP32-C5", value: "esp32c5" },
+       { text: "ESP32-C61", value: "esp32c61" },
     ]
 };
diff --git a/docs/conf_common.py b/docs/conf_common.py
@@ -11,6 +11,8 @@
     "esp32c6",
     "esp32h2",
     "esp32p4",
+    "esp32c5",
+    "esp32c61",
 ]
 
 # link roles config
@@ -42,6 +44,8 @@
     "esp32c6": ESP32_DOCS,
     "esp32h2": ESP32_DOCS,
     "esp32p4": ESP32_DOCS,
+    "esp32c5": ESP32_DOCS,
+    "esp32c61": ESP32_DOCS,
 }
 
 # Extra options required by sphinx_idf_theme

diff --git a/docs/en/advanced-topics/boot-mode-selection.rst b/docs/en/advanced-topics/boot-mode-selection.rst
@@ -1,6 +1,6 @@
-{IDF_TARGET_STRAP_BOOT_GPIO:default="GPIO9", esp32="GPIO0", esp32s2="GPIO0", esp32s3="GPIO0", esp32p4="GPIO35"}
+{IDF_TARGET_STRAP_BOOT_GPIO:default="GPIO9", esp32="GPIO0", esp32s2="GPIO0", esp32s3="GPIO0", esp32p4="GPIO35", esp32c5="GPIO28"}
 
-{IDF_TARGET_STRAP_BOOT_2_GPIO:default="GPIO8", esp32="GPIO2", esp32s2="GPIO46", esp32s3="GPIO46", esp32p4="GPIO36"}
+{IDF_TARGET_STRAP_BOOT_2_GPIO:default="GPIO8", esp32="GPIO2", esp32s2="GPIO46", esp32s3="GPIO46", esp32p4="GPIO36", esp32c5="GPIO27"}
 
 {IDF_TARGET_BOOTLOADER_OFFSET:default="0", esp32="1000", esp32s2="1000", esp32p4="2000"}
 
@@ -87,7 +87,7 @@ This guide explains how to select the boot mode correctly and describes the boot
 
       {IDF_TARGET_STRAP_BOOT_2_GPIO} must also be either left unconnected/floating, or driven Low, in order to enter the serial bootloader.
 
-   .. only:: esp32c3 or esp32c2 or esp32h2 or esp32c6 or esp32p4
+   .. only:: esp32c3 or esp32c2 or esp32h2 or esp32c6 or esp32p4 or esp32c5 or esp32c61
 
       {IDF_TARGET_STRAP_BOOT_2_GPIO} must also be driven High, in order to enter the serial bootloader reliably. The strapping combination of {IDF_TARGET_STRAP_BOOT_2_GPIO} = 0 and {IDF_TARGET_STRAP_BOOT_GPIO} = 0 is invalid and will trigger unexpected behavior.
 

diff --git a/docs/en/advanced-topics/firmware-image-format.rst b/docs/en/advanced-topics/firmware-image-format.rst
@@ -91,7 +91,25 @@ The image header is 8 bytes long:
         Flash frequency with value ``0`` can mean either 80MHz or 40MHz based on MSPI clock source mode.
 
 
-.. only:: not (esp8266 or esp32c6 or esp32s3 or esp32s2 or esp32p4)
+.. only:: esp32c5 or esp32c61
+
+    +--------+------------------------------------------------------------------------------------------------+
+    | Byte   | Description                                                                                    |
+    +========+================================================================================================+
+    | 0      | Magic number (always ``0xE9``)                                                                 |
+    +--------+------------------------------------------------------------------------------------------------+
+    | 1      | Number of segments                                                                             |
+    +--------+------------------------------------------------------------------------------------------------+
+    | 2      | SPI Flash Mode (``0`` = QIO, ``1`` = QOUT, ``2`` = DIO, ``3`` = DOUT)                          |
+    +--------+------------------------------------------------------------------------------------------------+
+    | 3      | High four bits - Flash size (``0`` = 1MB, ``1`` = 2MB, ``2`` = 4MB, ``3`` = 8MB, ``4`` = 16MB) |
+    |        |                                                                                                |
+    |        | Low four bits - Flash frequency (``0xf`` = {IDF_TARGET_FLASH_FREQ_F}MHz, ``0`` = {IDF_TARGET_FLASH_FREQ_0}MHz, ``2`` = {IDF_TARGET_FLASH_FREQ_2}MHz)                |
+    +--------+------------------------------------------------------------------------------------------------+
+    | 4-7    | Entry point address                                                                            |
+    +--------+------------------------------------------------------------------------------------------------+
+
+.. only:: not (esp8266 or esp32c6 or esp32s3 or esp32s2 or esp32p4 or esp32c5 or esp32c61)
 
     +--------+------------------------------------------------------------------------------------------------+
     | Byte   | Description                                                                                    |