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HIFI3 patches for LX6 CPU family rebased to Clang-16 (LLVM-295) #85

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4a299e5
[Xtensa] Add definition of S3 output registers.
maciej-czekaj Sep 11, 2023
507afb8
[Xtensa] Add Boolean Extension feature
maciej-czekaj Mar 27, 2023
01ca420
[Xtensa] Refactor loadImmediate
maciej-czekaj Mar 27, 2023
35e7437
[Xtensa] Implement BRegFixupPass
maciej-czekaj Mar 27, 2023
1091700
[Xtensa] Add LLVM tests for Boolean Extension
maciej-czekaj Mar 27, 2023
dcbed27
[Xtensa] Separate directory for Clang CodeGen tests
maciej-czekaj Mar 27, 2023
7d293b4
[Xtensa] Add ABI test for xtbool
maciej-czekaj Mar 27, 2023
0ed3832
[Xtensa] Implement conditional move instrinsics
maciej-czekaj Mar 27, 2023
bdd1248
[Xtensa] Add basic float intrinsics
maciej-czekaj Mar 27, 2023
6a133f6
[Xtensa] Implement remaining floating point intrinsics
maciej-czekaj Mar 27, 2023
201193c
[Xtensa] Add Cannonlake CPU
maciej-czekaj Mar 27, 2023
94b1ca6
[Xtensa] Make assembler output compatible with GAS
maciej-czekaj Mar 27, 2023
3121dd2
[Xtensa] Add HIFI3 intrinsic functions
maciej-czekaj Jun 29, 2023
952c459
[Xtensa] Add HIFI3 register classes
maciej-czekaj Jun 29, 2023
07930a6
[Xtensa] Add HIFI3 target feature
maciej-czekaj Jun 29, 2023
f168af2
[Xtensa] Add HIFI3 instructions
maciej-czekaj Nov 13, 2023
156aad4
[Xtensa] Add support for boolean vectors
maciej-czekaj Jun 29, 2023
f816690
[Xtensa] Add HIFI3 instruction lowering
maciej-czekaj Jun 30, 2023
8f879ba
[Xtensa] Fix alignment in LowerVACOPY()
maciej-czekaj Jun 30, 2023
6a97b0d
[Xtensa] Add HIFI3 instruction selection patterns
maciej-czekaj Jun 29, 2023
5102d62
[Xtensa] Add codegen tests for vector operators
maciej-czekaj Jun 29, 2023
c600b19
[Xtensa] Add codegen support for HIFI3 intrinsics
maciej-czekaj Jun 29, 2023
4653c20
[Xtensa] Support bit vectors in BRegFixupPass
maciej-czekaj Jun 29, 2023
e278a13
[Xtensa] Add codegen tests for bit vectors
maciej-czekaj Jun 29, 2023
9125859
[Xtensa] Remove unsspported intrinsic xt_conjc_s
maciej-czekaj Jun 29, 2023
bdcbe3d
[Xtensa] Add HIFI3 intrinsic definitions to clang
maciej-czekaj Jun 29, 2023
f606b11
[Xtensa] Add constant checks for HIFI3 intrinsics
maciej-czekaj Jun 29, 2023
94de026
[Xtensa] Support HIFI3 vectors in LLVM calls
maciej-czekaj Jun 29, 2023
1269d05
[Xtensa] Add HIFI3 intrinsics to Clang codegen
maciej-czekaj Jun 29, 2023
2a98ad4
[Xtensa] Fix xt_lsxp builtin definition
maciej-czekaj Jun 29, 2023
151e468
[Xtensa] Support bool vectors in LLVM calls
maciej-czekaj Jun 29, 2023
1700438
[Xtensa] Add --text-section-literals option
maciej-czekaj Jun 29, 2023
e5f986c
[Xtensa] Add vector conversion builtins
maciej-czekaj Aug 4, 2023
215e298
[Xtensa] Add HIFI3 C types and intrinsics
maciej-czekaj Jun 29, 2023
8618904
[Xtensa] Add support for decoding from HIFI namespace
maciej-czekaj Oct 16, 2023
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160 changes: 159 additions & 1 deletion clang/include/clang/Basic/BuiltinsXtensa.def
Original file line number Diff line number Diff line change
Expand Up @@ -124,7 +124,165 @@ BUILTIN(__builtin_xtensa_wsr_m3, "vUi", "n")
BUILTIN(__builtin_xtensa_rsr_m3, "Ui", "n")
BUILTIN(__builtin_xtensa_xsr_m3, "vUi*", "n")

// Float intrinsics

// float __builtin_xtensa_xt_movt_s(float frr, float frs, xtbool bt)
BUILTIN(__builtin_xtensa_xt_movt_s, "fffE1b", "n")

// float __builtin_xtensa_xt_movf_s(float frr, float frs, xtbool bt)
BUILTIN(__builtin_xtensa_xt_movf_s, "fffE1b", "n")

// xtbool __builtin_xtensa_xt_oeq_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_oeq_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_ole_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_ole_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_olt_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_olt_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_ueq_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_ueq_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_ule_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_ule_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_ult_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_ult_s, "E1bff", "n")

// xtbool __builtin_xtensa_xt_un_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_un_s, "E1bff", "n")

// xtfloat __builtin_xtensa_xt_sub_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_sub_s, "fff", "n")

// xtfloat __builtin_xtensa_xt_add_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_add_s, "fff", "n")

// xtfloat __builtin_xtensa_xt_abs_s(xtfloat frs)
BUILTIN(__builtin_xtensa_xt_abs_s, "ff", "n")

// xtfloat __builtin_xtensa_xt_mul_s(xtfloat frs,xtfloat frt)
BUILTIN(__builtin_xtensa_xt_mul_s, "fff", "n")

// int __builtin_xtensa_xt_trunc_s(xtfloat frs,immediate imm_t)
BUILTIN(__builtin_xtensa_xt_trunc_s, "ifi", "n")

// int __builtin_xtensa_xt_utrunc_s(xtfloat frs,immediate imm_t)
BUILTIN(__builtin_xtensa_xt_utrunc_s, "ifi", "n")

// xtfloat __builtin_xtensa_xt_float_s(int ars,immediate imm_t)
BUILTIN(__builtin_xtensa_xt_float_s, "fii", "n")

// xtfloat __builtin_xtensa_xt_ufloat_s(int ars,immediate imm_t)
BUILTIN(__builtin_xtensa_xt_ufloat_s, "fii", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_addexp_s(xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_addexp_s, "fff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_addexpm_s(xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_addexpm_s, "fff", "n")

// int __builtin_xtensa___builtin_xtensa_xt_ceil_s(xtfloat,immediate)
BUILTIN(__builtin_xtensa_xt_ceil_s, "ifi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_div0_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_div0_s, "ff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_divn_s(xtfloat,xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_divn_s, "ffff", "n")

// int __builtin_xtensa___builtin_xtensa_xt_floor_s(xtfloat,immediate)
BUILTIN(__builtin_xtensa_xt_floor_s, "ifi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_lsi(const xtfloat*,immediate)
BUILTIN(__builtin_xtensa_xt_lsi, "ff*i", "n")

BUILTIN(__builtin_xtensa_xt_lsip, "ff**i", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_lsx(const xtfloat*,int)
BUILTIN(__builtin_xtensa_xt_lsx, "ff*i", "n")

BUILTIN(__builtin_xtensa_xt_lsxp, "ff**i", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_madd_s(xtfloat,xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_madd_s, "ffff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_maddn_s(xtfloat,xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_maddn_s, "ffff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_mkdadj_s(xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_mkdadj_s, "fff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_mksadj_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_mksadj_s, "ff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_mov_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_mov_s, "ff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_moveqz_s(xtfloat,xtfloat,int)
BUILTIN(__builtin_xtensa_xt_moveqz_s, "fffi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_movgez_s(xtfloat,xtfloat,int)
BUILTIN(__builtin_xtensa_xt_movgez_s, "fffi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_movltz_s(xtfloat,xtfloat,int)
BUILTIN(__builtin_xtensa_xt_movltz_s, "fffi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_movnez_s(xtfloat,xtfloat,int)
BUILTIN(__builtin_xtensa_xt_movnez_s, "fffi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_msub_s(xtfloat,xtfloat,xtfloat)
BUILTIN(__builtin_xtensa_xt_msub_s, "ffff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_neg_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_neg_s, "ff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_nexp01_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_nexp01_s, "ff", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_recip0_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_recip0_s, "ff", "n")

// int __builtin_xtensa___builtin_xtensa_xt_rfr(xtfloat)
BUILTIN(__builtin_xtensa_xt_rfr, "if", "n")

// int __builtin_xtensa___builtin_xtensa_xt_round_s(xtfloat,immediate)
BUILTIN(__builtin_xtensa_xt_round_s, "ifi", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_rsqrt0_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_rsqrt0_s, "ff", "n")

// int __builtin_xtensa___builtin_xtensa_xt_rur_fcr()
BUILTIN(__builtin_xtensa_xt_rur_fcr, "i", "n")

// int __builtin_xtensa___builtin_xtensa_xt_rur_fsr()
BUILTIN(__builtin_xtensa_xt_rur_fsr, "i", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_sqrt0_s(xtfloat)
BUILTIN(__builtin_xtensa_xt_sqrt0_s, "ff", "n")

// void __builtin_xtensa___builtin_xtensa_xt_ssi(xtfloat,xtfloat*,immediate)
BUILTIN(__builtin_xtensa_xt_ssi, "vff*i", "n")

// xtfloat* __builtin_xtensa___builtin_xtensa_xt_ssip(xtfloat,xtfloat*,immediate)
BUILTIN(__builtin_xtensa_xt_ssip, "f*ff*i", "n")

// void __builtin_xtensa___builtin_xtensa_xt_ssx(xtfloat,xtfloat*,int)
BUILTIN(__builtin_xtensa_xt_ssx, "vff*i", "n")

// xtfloat* __builtin_xtensa___builtin_xtensa_xt_ssxp(xtfloat,xtfloat*,int)
BUILTIN(__builtin_xtensa_xt_ssxp, "f*ff*i", "n")

// xtfloat __builtin_xtensa___builtin_xtensa_xt_wfr(int)
BUILTIN(__builtin_xtensa_xt_wfr, "fi", "n")

// void __builtin_xtensa___builtin_xtensa_xt_wur_fcr(int)
BUILTIN(__builtin_xtensa_xt_wur_fcr, "vi", "n")

// void __builtin_xtensa___builtin_xtensa_xt_wur_fsr(int)
BUILTIN(__builtin_xtensa_xt_wur_fsr, "vi", "n")

// generated code
#include "clang/Basic/BuiltinsXtensaESP32S3.def"

#undef BUILTIN
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