IRGeneratorForStatements: Fix undefined order of functions when gener…

…ating code for index expressions

Changelog.md

@@ -4,6 +4,7 @@ Language Features:
  * Allow qualified access to events from other contracts.
 
 Compiler Features:
+ * Code Generator: Fix not entirely deterministic order of functions in unoptimized Yul output. The choice of C++ compiler in some cases would result in different (but equivalent) bytecode. Official binaries are affected.
  * Commandline Interface: Add ``--ast-compact-json`` output in assembler mode.
  * Commandline Interface: Add ``--ir-ast-json`` and ``--ir-optimized-ast-json`` outputs for Solidity input, providing AST in compact JSON format for IR and optimized IR.
  * Commandline Interface: Respect ``--optimize-yul`` and ``--no-optimize-yul`` in compiler mode and accept them in assembler mode as well. ``--optimize --no-optimize-yul`` combination now allows enabling EVM assembly optimizer without enabling Yul optimizer.

libsolidity/codegen/ir/IRGeneratorForStatements.cpp

@@ -2295,13 +2295,13 @@ void IRGeneratorForStatements::endVisit(IndexAccess const& _indexAccess)
 			}
 			case DataLocation::Memory:
 			{
-				string const memAddress =
-					m_utils.memoryArrayIndexAccessFunction(arrayType) +
-					"(" +
-					IRVariable(_indexAccess.baseExpression()).part("mpos").name() +
-					", " +
-					expressionAsType(*_indexAccess.indexExpression(), *TypeProvider::uint256()) +
-					")";
+				string const indexAccessFunction = m_utils.memoryArrayIndexAccessFunction(arrayType);
+				string const baseRef = IRVariable(_indexAccess.baseExpression()).part("mpos").name();
+				string const indexExpression = expressionAsType(
+					*_indexAccess.indexExpression(),
+					*TypeProvider::uint256()
+				);
+				string const memAddress = indexAccessFunction + "(" + baseRef + ", " + indexExpression + ")";
 
 				setLValue(_indexAccess, IRLValue{
 					*arrayType.baseType(),