BCH_EUCLIDEAN_RTL

BCH decoder using Modified Euclidean algorithm parallel architecture

Block diagram of BCH Decoder\

Block diagram of State Machine of BCH Decoder\

Timing Chart\

Decoder Pin table
N = 8bits or 12bits, M = 2^(code_length) -1

Name		Name	Last commit message	Last commit date
Latest commit History 12 Commits
encoder		encoder
p32		p32
photo		photo
Qin.doc		Qin.doc
README.md		README.md
bch_decode.v		bch_decode.v
chien_lib.v		chien_lib.v
chien_search_p16_t8.v		chien_search_p16_t8.v
correct_module_4cells_p16.v		correct_module_4cells_p16.v
correct_module_4cells_p16_gate.v		correct_module_4cells_p16_gate.v
correct_module_4cells_p16_tbw.v		correct_module_4cells_p16_tbw.v
correct_module_4cells_p16_tbw_g.v		correct_module_4cells_p16_tbw_g.v
degree_computation.v		degree_computation.v
euclidean_4cells.v		euclidean_4cells.v
euclidean_cell.v		euclidean_cell.v
euclidean_polynomial.v		euclidean_polynomial.v
feedback_ckt.v		feedback_ckt.v
multiplier.v		multiplier.v
multiplier_column1_p16.v		multiplier_column1_p16.v
multiplier_column2_p16.v		multiplier_column2_p16.v
multiplier_column3_p16.v		multiplier_column3_p16.v
multiplier_column4_p16.v		multiplier_column4_p16.v
multiplier_column5_p16.v		multiplier_column5_p16.v
multiplier_column6_p16.v		multiplier_column6_p16.v
multiplier_column7_p16.v		multiplier_column7_p16.v
multiplier_column8_p16.v		multiplier_column8_p16.v
multiply_3196.v		multiply_3196.v
multiply_3453.v		multiply_3453.v
multiply_3710.v		multiply_3710.v
multiply_3967.v		multiply_3967.v
multiply_7163.v		multiply_7163.v
multiply_7420.v		multiply_7420.v
multiply_7677.v		multiply_7677.v
multiply_7934.v		multiply_7934.v
mux13_13.v		mux13_13.v
mux_13.v		mux_13.v
mux_13_2to1.v		mux_13_2to1.v
mux_1_2to1.v		mux_1_2to1.v
mux_5.v		mux_5.v
mux_5_2to1.v		mux_5_2to1.v
syn_lib.v		syn_lib.v
syndrome.v		syndrome.v
syndrome_tbw.v		syndrome_tbw.v

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