fby3: dl: fix lpc malfunction and gpio null pointer accessment #485
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Summary: - Align yv3 ti server board gpio number. Test plan: Build code: pass
Summary: - Set GPIOB1 to default low due to mis-config before - Remove GPIOG0 interrupt enable due to mis-config before - Disable GPIOO3 in GPIO config because this pin is for LPCRST# function. - Change FM_FORCE_ADR_N to RST_PLTRST_BMC_N on both firmware(CPLD/BIC) and hardware side (Original background: GPIO RST_PLTRST_BMC_N and LPCRST# are same pin on aspeed bic but aspeed bic cannot support dual function at the same time) Test plan: build pass on fby3 dl
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Summary:
(Original background: GPIO RST_PLTRST_BMC_N and LPCRST# are same pin on aspeed bic but aspeed bic cannot support dual function at the same time)
Dependency: #458
Test plan:
build pass on fby3 dl