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fby3.5: rf: Impl CXL FW update #521

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fby3.5: rf: Impl CXL FW update #521

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@Scron-Chang Scron-Chang commented Aug 30, 2022 •
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  1. Enable the USB feature.
    BMC will use this bus to transfer data to update.
  2. Implement CXL controller FW update.
  3. Change the SPI clock to 3.125MHz.
    The RF needs to reduce the SPI clock in the EVT stage due to hardware buffer limitations. This patch can be removed when RF gets into the DVT stage.
  4. Correct the specifier of fw_update printf to pass the run-coocheck.

@Scron-Chang
fby3.5: rf: Enable USB feature.
967d3ee 
Modify the kernel config file to enable the USB feature.

Signed-off-by: Scron Chang <Scron.Chang@quantatw.com>
@facebook-github-bot facebook-github-bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Aug 30, 2022
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@GoldenBug has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator.

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@Scron-Chang has updated the pull request. You must reimport the pull request before landing.

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Scron-Chang commented Sep 1, 2022 •
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PatchSet01: Fix bugs in CXL controller FW update

  1. Fix bug in plat_spi:switch_cxl_spi_mux.
    Return false if the argument is invalid.

  2. Fix bug in plat_spi:control_flash_power.
    Do break after the P1V8_ASIC_PG_R is checked.

  3. Fix the logical fault in plat_spi:switch_cxl_spi_mux

  4. Add a new return value to the enum: FIRMWARE_UPDATE_RETURN_CODE.
    The purpose is to distinguish whether the platform supports updating
    the cxl controller FW or not.

Tested:
Succeed in updating cxl controller fw.

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@Scron-Chang
fby3.5: rf: Impl CXL FW update
5d03ded 
Implement CXL conttroller FW update to RF BIC.
The image to update is 32MB. The RF BIC checks the standby power,
P1V8_ASIC, and the direction of the SPI switch and then writes data.

Tested:
Write different images for 20 times, and they are all successful.

Signed-off-by: Scron Chang <Scron.Chang@quantatw.com>
@Scron-Chang
fby3.5: rf: Change the SPI clock to 3.125MHz
dc48a9b 
In the EVT stage, RF needs this patch because of the SPI buffer
limitation.
It will be fixed in the DVT stage, and this patch can be reverted.

Tested:
The SPI reading and writing both work well.

uart:~$ flash update_test spi1_cs0 0
Writing 4092 bytes to spi1_cs0 (offset: 0x00000000)...
Update done.
RW test pass
uart:~$ flash read spi1_cs0 0 100
00000000: 7a 79 78 77 76 75 74 73  72 71 70 6f 6e 6d 6c 6b |zyxwvuts rqponmlk|
00000010: 6a 69 68 67 66 65 64 63  62 61 7a 79 78 77 76 75 |jihgfedc bazyxwvu|
00000020: 74 73 72 71 70 6f 6e 6d  6c 6b 6a 69 68 67 66 65 |tsrqponm lkjihgfe|
00000030: 64 63 62 61 7a 79 78 77  76 75 74 73 72 71 70 6f |dcbazyxw vutsrqpo|
00000040: 6e 6d 6c 6b 6a 69 68 67  66 65 64 63 62 61 7a 79 |nmlkjihg fedcbazy|
00000050: 78 77 76 75 74 73 72 71  70 6f 6e 6d 6c 6b 6a 69 |xwvutsrq ponmlkji|
00000060: 68 67 66 65 64 63 62 61  7a 79 78 77 76 75 74 73 |hgfedcba zyxwvuts|
00000070: 72 71 70 6f 6e 6d 6c 6b  6a 69 68 67 66 65 64 63 |rqponmlk jihgfedc|
00000080: 62 61 7a 79 78 77 76 75  74 73 72 71 70 6f 6e 6d |bazyxwvu tsrqponm|
00000090: 6c 6b 6a 69 68 67 66 65  64 63 62 61 7a 79 78 77 |lkjihgfe dcbazyxw|
000000A0: 76 75 74 73 72 71 70 6f  6e 6d 6c 6b 6a 69 68 67 |vutsrqpo nmlkjihg|
000000B0: 66 65 64 63 62 61 7a 79  78 77 76 75 74 73 72 71 |fedcbazy xwvutsrq|
000000C0: 70 6f 6e 6d 6c 6b 6a 69  68 67 66 65 64 63 62 61 |ponmlkji hgfedcba|
000000D0: 7a 79 78 77 76 75 74 73  72 71 70 6f 6e 6d 6c 6b |zyxwvuts rqponmlk|
000000E0: 6a 69 68 67 66 65 64 63  62 61 7a 79 78 77 76 75 |jihgfedc bazyxwvu|
000000F0: 74 73 72 71 70 6f 6e 6d  6c 6b 6a 69 68 67 66 65 |tsrqponm lkjihgfe|

uart:~$

Signed-off-by: Scron Chang <Scron.Chang@quantatw.com>
@Scron-Chang
common: util_spi: Correct the printf specifier.
8a0786d 
The run-cppcheck blocks the pull-request and shows the following error
information:
```
Errors Found:
common/lib/util_spi.c:279:3:%d in format string (no. 2) requires 'int' but the argument type is 'unsigned int'.
```

This patch corrects the specifier and passes the run-cppcheck.

Signed-off-by: Scron Chang <Scron.Chang@quantatw.com>
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@Scron-Chang has updated the pull request. You must reimport the pull request before landing.

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@GoldenBug has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator.

@Scron-Chang Scron-Chang deleted the PR_Impl_CXL_FW_Update branch September 8, 2022 02:52
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