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fby3.5: hd: Update SDR table #557

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fby3.5: hd: Update SDR table #557

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Yi-Shum
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@Yi-Shum Yi-Shum commented Sep 14, 2022

Summary:

  • Modify the threshold of sensors in SDR table.

Test Plan:

  • Build code: PASS

Log:

root@bmc-oob:~# sensor-util slot1 -t
slot1:
MB Inlet Temp                (0x1) :   29.00 C     | (ok) | UCR: 60.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
MB Outlet Temp               (0x2) :   34.00 C     | (ok) | UCR: 80.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
FIO Temp                     (0x3) :   28.00 C     | (ok) | UCR: 40.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
CPU Temp                     (0x4) :   37.62 C     | (ok) | UCR: 95.00 | UNC: NA | UNR: 105.00 | LCR: NA | LNC: NA | LNR: NA
DIMMA Temp                   (0x5) :   30.50 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMB Temp                   (0x6) :   29.75 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMC Temp                   (0x7) :   29.50 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMME Temp                   (0x8) :   29.50 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMG Temp                   (0x9) :   28.50 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMH Temp                   (0xA) :   28.75 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMI Temp                   (0xB) :   28.25 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMK Temp                   (0xC) :   28.00 C     | (ok) | UCR: 85.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
SSD Temp                     (0xD) :   34.00 C     | (ok) | UCR: 70.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
HSC Temp                     (0xE) :   34.88 C     | (ok) | UCR: 100.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
CPU0 VR Temp                 (0xF) :   40.00 C     | (ok) | UCR: 105.00 | UNC: NA | UNR: 125.00 | LCR: NA | LNC: NA | LNR: NA
SOC VR Temp                  (0x10) :   40.00 C     | (ok) | UCR: 105.00 | UNC: NA | UNR: 125.00 | LCR: NA | LNC: NA | LNR: NA
CPU1 VR Temp                 (0x11) :   35.00 C     | (ok) | UCR: 105.00 | UNC: NA | UNR: 125.00 | LCR: NA | LNC: NA | LNR: NA
PVDDIO VR Temp               (0x12) :   36.00 C     | (ok) | UCR: 105.00 | UNC: NA | UNR: 125.00 | LCR: NA | LNC: NA | LNR: NA
PVDD11 VR Temp               (0x13) :   36.00 C     | (ok) | UCR: 105.00 | UNC: NA | UNR: 125.00 | LCR: NA | LNC: NA | LNR: NA
P12V_STBY Vol                (0x14) :   12.14 Volts | (ok) | UCR: 13.38 | UNC: 13.20 | UNR: 14.34 | LCR: 10.68 | LNC: 10.80 | LNR: 10.08
PVDD18_S5 Vol                (0x15) :    1.81 Volts | (ok) | UCR: 1.88 | UNC: NA | UNR: NA | LCR: 1.72 | LNC: NA | LNR: NA
P3V3_STBY Vol                (0x16) :    3.32 Volts | (ok) | UCR: 3.47 | UNC: NA | UNR: NA | LCR: 3.30 | LNC: NA | LNR: NA
PVDD11_S3 Vol                (0x17) :    1.10 Volts | (ok) | UCR: 1.16 | UNC: NA | UNR: NA | LCR: 1.03 | LNC: NA | LNR: NA
P3V_BAT Vol                  (0x18) :    3.16 Volts | (ok) | UCR: 3.63 | UNC: NA | UNR: NA | LCR: 2.69 | LNC: NA | LNR: NA
PVDD33_S5 Vol                (0x19) :    3.32 Volts | (ok) | UCR: 3.47 | UNC: NA | UNR: NA | LCR: 3.12 | LNC: NA | LNR: NA
P5V_STBY Vol                 (0x1A) :    5.00 Volts | (ok) | UCR: 5.26 | UNC: NA | UNR: NA | LCR: 4.74 | LNC: NA | LNR: NA
P12V_MEM_1 Vol               (0x1B) :   12.14 Volts | (ok) | UCR: 13.38 | UNC: 13.20 | UNR: 14.34 | LCR: 10.68 | LNC: 10.80 | LNR: 10.08
P12V_MEM_0 Vol               (0x1C) :   12.18 Volts | (ok) | UCR: 13.38 | UNC: 13.20 | UNR: 14.34 | LCR: 10.68 | LNC: 10.80 | LNR: 10.08
P1V2_STBY Vol                (0x1D) :    1.20 Volts | (ok) | UCR: 1.27 | UNC: NA | UNR: NA | LCR: 1.13 | LNC: NA | LNR: NA
P3V3_M2 Vol                  (0x1E) :    3.31 Volts | (ok) | UCR: 3.69 | UNC: 3.66 | UNR: NA | LCR: 2.91 | LNC: 2.94 | LNR: NA
P1V8_STBY Vol                (0x1F) :    1.81 Volts | (ok) | UCR: 1.90 | UNC: NA | UNR: NA | LCR: 1.70 | LNC: NA | LNR: NA
HSC Input Vol                (0x20) :   12.15 Volts | (ok) | UCR: 13.38 | UNC: 13.20 | UNR: 14.34 | LCR: 10.68 | LNC: 10.80 | LNR: 10.08
CPU0 VR Vol                  (0x21) :    0.76 Volts | (ok) | UCR: 1.71 | UNC: NA | UNR: NA | LCR: 0.37 | LNC: NA | LNR: NA
SOC VR Vol                   (0x22) :    0.88 Volts | (ok) | UCR: 1.36 | UNC: NA | UNR: NA | LCR: 0.59 | LNC: NA | LNR: NA
CPU1 VR Vol                  (0x23) :    0.76 Volts | (ok) | UCR: 1.71 | UNC: NA | UNR: NA | LCR: 0.37 | LNC: NA | LNR: NA
PVDDIO VR Vol                (0x24) :    1.05 Volts | (ok) | UCR: 1.29 | UNC: NA | UNR: NA | LCR: 0.81 | LNC: NA | LNR: NA
PVDD11 VR Vol                (0x25) :    1.10 Volts | (ok) | UCR: 1.17 | UNC: NA | UNR: NA | LCR: 1.04 | LNC: NA | LNR: NA
HSC Output Cur               (0x26) :    2.99 Amps  | (ok) | UCR: 45.87 | UNC: NA | UNR: 50.04 | LCR: NA | LNC: NA | LNR: NA
CPU0 VR Cur                  (0x27) :    1.20 Amps  | (ok) | UCR: 154.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
SOC VR Cur                   (0x28) :   10.50 Amps  | (ok) | UCR: 143.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
CPU1 VR Cur                  (0x29) :    3.70 Amps  | (ok) | UCR: 154.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
PVDDIO VR Cur                (0x2A) :    8.80 Amps  | (ok) | UCR: 121.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
PVDD11 VR Cur                (0x2B) :    1.40 Amps  | (ok) | UCR: 88.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
HSC Input Pwr                (0x2C) :   36.72 Watts | (ok) | UCR: 550.00 | UNC: NA | UNR: 600.00 | LCR: NA | LNC: NA | LNR: NA
CPU0 VR Pwr                  (0x2D) :    1.00 Watts | (ok) | UCR: 264.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
SOC VR Pwr                   (0x2E) :    9.00 Watts | (ok) | UCR: 194.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
CPU1 VR Pwr                  (0x2F) :    2.00 Watts | (ok) | UCR: 264.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
PVDDIO VR Pwr                (0x30) :    9.00 Watts | (ok) | UCR: 156.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
PVDD11 VR Pwr                (0x31) :    2.00 Watts | (ok) | UCR: 102.00 | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
CPU Pwr                      (0x32) :   44.83 Watts | (ok) | UCR: NA | UNC: NA | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMA Pwr                    (0x33) :    0.00 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMB Pwr                    (0x34) :    0.50 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMC Pwr                    (0x35) :    0.75 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMME Pwr                    (0x36) :    0.12 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMG Pwr                    (0x37) :    1.12 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMH Pwr                    (0x38) :    0.00 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMI Pwr                    (0x39) :    0.12 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA
DIMMK Pwr                    (0x3A) :    1.00 Watts | (ok) | UCR: 31.27 | UNC: 30.98 | UNR: NA | LCR: NA | LNC: NA | LNR: NA

@Yi-Shum
fby3.5: hd: Update SDR table
45efa8a 
Summary:
- Modify the threshold of sensors in SDR table.

Test Plan:
- Build code: PASS
@facebook-github-bot facebook-github-bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Sep 14, 2022
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@GoldenBug has imported this pull request. If you are a Meta employee, you can view this diff on Phabricator.

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