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[variant] Add Generic F100Cx
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Supersed stm32duino#1208

Signed-off-by: Martin Cerný <mail@martincerny.info>
Co-authored-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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2 people authored and fpistm committed Apr 14, 2021
1 parent 815027d commit 2dc6d09
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Showing 6 changed files with 442 additions and 4 deletions.
2 changes: 2 additions & 0 deletions README.md
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Expand Up @@ -178,6 +178,8 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d

| Status | Device(s) | Name | Release | Notes |
| :----: | :-------: | ---- | :-----: | :---- |
| :yellow_heart: | STM32F100C4<br>STM32F100C6 | Generic Board | **2.0.0** | |
| :yellow_heart: | STM32F100C8<br>STM32F100CB | Generic Board | **2.0.0** | |
| :green_heart: | STM32F103C6<br>STM32F103C8<br>STM32F103CB | [Blue Pill](https://stm32-base.org/boards/STM32F103C8T6-Blue-Pill) | *1.2.0* | USB CDC support since *1.5.0*<br> Maple bootloaders support since *1.6.0* |
| :green_heart: | STM32F103C8<br>STM32F103CB | [Black Pill](https://stm32-base.org/boards/STM32F103C8T6-Black-Pill) | *1.5.0* | |
| :green_heart: | STM32F103C4<br>STM32F103C6<br>STM32F103C8<br>STM32F103CB | Generic Board | *1.9.0* | |
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32 changes: 32 additions & 0 deletions boards.txt
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Expand Up @@ -1256,6 +1256,38 @@ GenF1.menu.pnum.BLUEBUTTON_F103RET.build.product_line=STM32F103xE
GenF1.menu.pnum.BLUEBUTTON_F103RET.build.variant=STM32F1xx/F103R(C-D-E)T
GenF1.menu.pnum.BLUEBUTTON_F103RET.build.variant_h=variant_{build.board}.h

# Generic F100C4Tx
GenF1.menu.pnum.GENERIC_F100C4TX=Generic F100C4Tx
GenF1.menu.pnum.GENERIC_F100C4TX.upload.maximum_size=16384
GenF1.menu.pnum.GENERIC_F100C4TX.upload.maximum_data_size=4096
GenF1.menu.pnum.GENERIC_F100C4TX.build.board=GENERIC_F100C4TX
GenF1.menu.pnum.GENERIC_F100C4TX.build.product_line=STM32F100xB
GenF1.menu.pnum.GENERIC_F100C4TX.build.variant=STM32F1xx/F100C(4-6)T

# Generic F100C6Tx
GenF1.menu.pnum.GENERIC_F100C6TX=Generic F100C6Tx
GenF1.menu.pnum.GENERIC_F100C6TX.upload.maximum_size=32768
GenF1.menu.pnum.GENERIC_F100C6TX.upload.maximum_data_size=4096
GenF1.menu.pnum.GENERIC_F100C6TX.build.board=GENERIC_F100C6TX
GenF1.menu.pnum.GENERIC_F100C6TX.build.product_line=STM32F100xB
GenF1.menu.pnum.GENERIC_F100C6TX.build.variant=STM32F1xx/F100C(4-6)T

# Generic F100C8Tx
GenF1.menu.pnum.GENERIC_F100C8TX=Generic F100C8Tx
GenF1.menu.pnum.GENERIC_F100C8TX.upload.maximum_size=65536
GenF1.menu.pnum.GENERIC_F100C8TX.upload.maximum_data_size=8192
GenF1.menu.pnum.GENERIC_F100C8TX.build.board=GENERIC_F100C8TX
GenF1.menu.pnum.GENERIC_F100C8TX.build.product_line=STM32F100xB
GenF1.menu.pnum.GENERIC_F100C8TX.build.variant=STM32F1xx/F100C(8-B)T

# Generic F100CBTx
GenF1.menu.pnum.GENERIC_F100CBTX=Generic F100CBTx
GenF1.menu.pnum.GENERIC_F100CBTX.upload.maximum_size=131072
GenF1.menu.pnum.GENERIC_F100CBTX.upload.maximum_data_size=8192
GenF1.menu.pnum.GENERIC_F100CBTX.build.board=GENERIC_F100CBTX
GenF1.menu.pnum.GENERIC_F100CBTX.build.product_line=STM32F100xB
GenF1.menu.pnum.GENERIC_F100CBTX.build.variant=STM32F1xx/F100C(8-B)T

# Generic F100R8Tx
GenF1.menu.pnum.GENERIC_F100R8TX=Generic F100R8Tx
GenF1.menu.pnum.GENERIC_F100R8TX.upload.maximum_size=65536
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29 changes: 27 additions & 2 deletions variants/STM32F1xx/F100C(4-6)T/generic_clock.c
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Expand Up @@ -20,8 +20,33 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
177 changes: 177 additions & 0 deletions variants/STM32F1xx/F100C(4-6)T/ldscript.ld
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/**
******************************************************************************
* @file LinkerScript.ld
* @author Auto-generated by STM32CubeIDE
* @brief Linker script for STM32F100C4Tx Device from STM32F1 series
* 16Kbytes FLASH
* 4Kbytes RAM
*
* Set heap size, stack size and stack location according
* to application requirements.
*
* Set memory bank area and size if external memory is used
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/* Entry Point */
ENTRY(Reset_Handler)

/* Highest address of the user mode stack */
_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */

_Min_Heap_Size = 0x200; /* required amount of heap */
_Min_Stack_Size = 0x400; /* required amount of stack */

/* Memories definition */
MEMORY
{
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = LD_MAX_DATA_SIZE
FLASH (rx) : ORIGIN = 0x8000000 + LD_FLASH_OFFSET, LENGTH = LD_MAX_SIZE - LD_FLASH_OFFSET
}

/* Sections */
SECTIONS
{
/* The startup code into "FLASH" Rom type memory */
.isr_vector :
{
. = ALIGN(4);
KEEP(*(.isr_vector)) /* Startup code */
. = ALIGN(4);
} >FLASH

/* The program code and other data into "FLASH" Rom type memory */
.text :
{
. = ALIGN(4);
*(.text) /* .text sections (code) */
*(.text*) /* .text* sections (code) */
*(.glue_7) /* glue arm to thumb code */
*(.glue_7t) /* glue thumb to arm code */
*(.eh_frame)

KEEP (*(.init))
KEEP (*(.fini))

. = ALIGN(4);
_etext = .; /* define a global symbols at end of code */
} >FLASH

/* Constant data into "FLASH" Rom type memory */
.rodata :
{
. = ALIGN(4);
*(.rodata) /* .rodata sections (constants, strings, etc.) */
*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
. = ALIGN(4);
} >FLASH

.ARM.extab : {
. = ALIGN(4);
*(.ARM.extab* .gnu.linkonce.armextab.*)
. = ALIGN(4);
} >FLASH

.ARM : {
. = ALIGN(4);
__exidx_start = .;
*(.ARM.exidx*)
__exidx_end = .;
. = ALIGN(4);
} >FLASH

.preinit_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__preinit_array_start = .);
KEEP (*(.preinit_array*))
PROVIDE_HIDDEN (__preinit_array_end = .);
. = ALIGN(4);
} >FLASH

.init_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__init_array_start = .);
KEEP (*(SORT(.init_array.*)))
KEEP (*(.init_array*))
PROVIDE_HIDDEN (__init_array_end = .);
. = ALIGN(4);
} >FLASH

.fini_array :
{
. = ALIGN(4);
PROVIDE_HIDDEN (__fini_array_start = .);
KEEP (*(SORT(.fini_array.*)))
KEEP (*(.fini_array*))
PROVIDE_HIDDEN (__fini_array_end = .);
. = ALIGN(4);
} >FLASH

/* Used by the startup to initialize data */
_sidata = LOADADDR(.data);

/* Initialized data sections into "RAM" Ram type memory */
.data :
{
. = ALIGN(4);
_sdata = .; /* create a global symbol at data start */
*(.data) /* .data sections */
*(.data*) /* .data* sections */
*(.RamFunc) /* .RamFunc sections */
*(.RamFunc*) /* .RamFunc* sections */

. = ALIGN(4);
_edata = .; /* define a global symbol at data end */

} >RAM AT> FLASH

/* Uninitialized data section into "RAM" Ram type memory */
. = ALIGN(4);
.bss :
{
/* This is used by the startup in order to initialize the .bss section */
_sbss = .; /* define a global symbol at bss start */
__bss_start__ = _sbss;
*(.bss)
*(.bss*)
*(COMMON)

. = ALIGN(4);
_ebss = .; /* define a global symbol at bss end */
__bss_end__ = _ebss;
} >RAM

/* User_heap_stack section, used to check that there is enough "RAM" Ram type memory left */
._user_heap_stack :
{
. = ALIGN(8);
PROVIDE ( end = . );
PROVIDE ( _end = . );
. = . + _Min_Heap_Size;
. = . + _Min_Stack_Size;
. = ALIGN(8);
} >RAM

/* Remove information from the compiler libraries */
/DISCARD/ :
{
libc.a ( * )
libm.a ( * )
libgcc.a ( * )
}

.ARM.attributes 0 : { *(.ARM.attributes) }
}
29 changes: 27 additions & 2 deletions variants/STM32F1xx/F100C(8-B)T/generic_clock.c
Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,33 @@
*/
WEAK void SystemClock_Config(void)
{
/* SystemClock_Config can be generated by STM32CubeMX */
#warning "SystemClock_Config() is empty. Default clock at reset is used."
RCC_OscInitTypeDef RCC_OscInitStruct = {};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};

/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;

if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK) {
Error_Handler();
}
}

#endif /* ARDUINO_GENERIC_* */
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