[variant] Add Generic F7xx

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>

README.md

@@ -56,6 +56,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
  - [Generic STM32F2 boards](#generic-stm32f2-boards)
  - [Generic STM32F3 boards](#generic-stm32f3-boards)
  - [Generic STM32F4 boards](#generic-stm32f4-boards)
+ - [Generic STM32F7 boards](#generic-stm32f7-boards)
  - [Generic STM32G0 boards](#generic-stm32g0-boards)
  - [Generic STM32G4 boards](#generic-stm32g4-boards)
  - [Generic STM32H7 boards](#generic-stm32h7-boards)
@@ -232,6 +233,24 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 | :green_heart:  | STM32F446RC<br>STM32F446RE | Generic Board | *1.9.0* |  |
 | :green_heart:  | STM32F411CE | [ThunderPack v1.1+](https://github.com/jgillick/ThunderPack) | *1.9.0* |  |
 
+### Generic STM32F7 boards
+
+| Status | Device(s) | Name | Release | Notes |
+| :----: | :-------: | ---- | :-----: | :---- |
+| :yellow_heart: | STM32F745ZE<br>STM32F745ZG | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F746BE<br>STM32F746BG<br>STM32F746NE<br>STM32F746NG | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F746ZE<br>STM32F746ZG | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F750N8 | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F750Z8 | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F756BG<br>STM32F756NG | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F756ZG | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F765VG<br>STM32F765VI | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F765ZG<br>STM32F765ZI | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F767VG<br>STM32F767VI | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F767ZG<br>STM32F767ZI | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F777VI | Generic Board | **2.0.0** |  |
+| :yellow_heart: | STM32F777ZI | Generic Board | **2.0.0** |  |
+
 ### Generic STM32G0 boards
 
 | Status | Device(s) | Name | Release | Notes |

variants/STM32F7xx/F745Z(E-G)Tx_F746Z(E-G)Yx_F746ZETx_F746ZGTx_F750Z8Tx_F756ZG/generic_clock.c

@@ -24,8 +24,52 @@
   */
 WEAK void SystemClock_Config(void)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 8;
+  RCC_OscInitStruct.PLL.PLLN = 216;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = 9;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /** Activate the Over-Drive mode
+  */
+  if (HAL_PWREx_EnableOverDrive() != HAL_OK) {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) {
+    Error_Handler();
+  }
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SDMMC1 | RCC_PERIPHCLK_CLK48;
+  PeriphClkInitStruct.Clk48ClockSelection = RCC_CLK48SOURCE_PLL;
+  PeriphClkInitStruct.Sdmmc1ClockSelection = RCC_SDMMC1CLKSOURCE_CLK48;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
 }
 
 #endif /* ARDUINO_GENERIC_* */