[variant] Add Generic F3xx

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
fpistm · Mar 29, 2021 · d8ce03d · d8ce03d
1 parent 99a751a
commit d8ce03d
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Showing 42 changed files with 2,452 additions and 3,571 deletions.
diff --git a/README.md b/README.md
@@ -200,7 +200,12 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
 
 | Status | Device(s) | Name | Release | Notes |
 | :----: | :-------: | ---- | :-----: | :---- |
+| :yellow_heart:  | STM32F302R6<br>STM32F302R8 | Generic Board | **2.0.0** |  |
+| :yellow_heart:  | STM32F303CB<br>STM32F303CC | Generic Board | **2.0.0** |  |
 | :green_heart:  | STM32F303CC | [RobotDyn Black Pill](https://stm32-base.org/boards/STM32F303CCT6-RobotDyn-Black-Pill) | *1.6.1* | [More info](https://robotdyn.com/catalog/development-boards/stm-boards-and-shields.html) |
+| :yellow_heart:  | STM32F303K6<br>STM32F303K8 | Generic Board | **2.0.0** |  |
+| :yellow_heart:  | STM32F303RD<br>STM32F303RE | Generic Board | **2.0.0** |  |
+| :yellow_heart:  | STM32F334K4<br>STM32F334K6<br>STM32F334K8 | Generic Board | **2.0.0** |  |
 
 ### Generic STM32F4 boards
 

diff --git a/boards.txt b/boards.txt
@@ -279,7 +279,7 @@ Nucleo_64.menu.pnum.NUCLEO_F302R8.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.board=NUCLEO_F302R8
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.series=STM32F3xx
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.product_line=STM32F302x8
-Nucleo_64.menu.pnum.NUCLEO_F302R8.build.variant=STM32F3xx/NUCLEO_F302R8
+Nucleo_64.menu.pnum.NUCLEO_F302R8.build.variant=STM32F3xx/F302R(6-8)Tx
 Nucleo_64.menu.pnum.NUCLEO_F302R8.build.cmsis_lib_gcc=arm_cortexM4lf_math
 
 # NUCLEO_F303RE board
@@ -292,7 +292,7 @@ Nucleo_64.menu.pnum.NUCLEO_F303RE.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.board=NUCLEO_F303RE
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.series=STM32F3xx
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.product_line=STM32F303xE
-Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/NUCLEO_F303RE
+Nucleo_64.menu.pnum.NUCLEO_F303RE.build.variant=STM32F3xx/F303R(D-E)Tx
 Nucleo_64.menu.pnum.NUCLEO_F303RE.build.cmsis_lib_gcc=arm_cortexM4lf_math
 
 # NUCLEO_F401RE board
@@ -530,7 +530,7 @@ Nucleo_32.menu.pnum.NUCLEO_F303K8.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=h
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.board=NUCLEO_F303K8
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.series=STM32F3xx
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.product_line=STM32F303x8
-Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/NUCLEO_F303K8
+Nucleo_32.menu.pnum.NUCLEO_F303K8.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
 Nucleo_32.menu.pnum.NUCLEO_F303K8.build.cmsis_lib_gcc=arm_cortexM4lf_math
 
 # NUCLEO_G031K8 board
@@ -1549,8 +1549,96 @@ GenF3.menu.pnum.BLACKPILL_F303CC.upload.maximum_size=262144
 GenF3.menu.pnum.BLACKPILL_F303CC.upload.maximum_data_size=40960
 GenF3.menu.pnum.BLACKPILL_F303CC.build.board=BLACKPILL_F303CC
 GenF3.menu.pnum.BLACKPILL_F303CC.build.product_line=STM32F303xC
-GenF3.menu.pnum.BLACKPILL_F303CC.build.variant_h=variant_PILL_F303XX.h
-GenF3.menu.pnum.BLACKPILL_F303CC.build.variant=STM32F3xx/PILL_F303XX
+GenF3.menu.pnum.BLACKPILL_F303CC.build.variant_h=variant_{build.board}.h
+GenF3.menu.pnum.BLACKPILL_F303CC.build.variant=STM32F3xx/F303C(B-C)Tx
+
+# Generic F302R6Tx
+GenF3.menu.pnum.GENERIC_F302R6TX=Generic F302R6Tx
+GenF3.menu.pnum.GENERIC_F302R6TX.upload.maximum_size=32768
+GenF3.menu.pnum.GENERIC_F302R6TX.upload.maximum_data_size=16384
+GenF3.menu.pnum.GENERIC_F302R6TX.build.board=GENERIC_F302R6TX
+GenF3.menu.pnum.GENERIC_F302R6TX.build.product_line=STM32F302x8
+GenF3.menu.pnum.GENERIC_F302R6TX.build.variant=STM32F3xx/F302R(6-8)Tx
+
+# Generic F302R8Tx
+GenF3.menu.pnum.GENERIC_F302R8TX=Generic F302R8Tx
+GenF3.menu.pnum.GENERIC_F302R8TX.upload.maximum_size=65536
+GenF3.menu.pnum.GENERIC_F302R8TX.upload.maximum_data_size=16384
+GenF3.menu.pnum.GENERIC_F302R8TX.build.board=GENERIC_F302R8TX
+GenF3.menu.pnum.GENERIC_F302R8TX.build.product_line=STM32F302x8
+GenF3.menu.pnum.GENERIC_F302R8TX.build.variant=STM32F3xx/F302R(6-8)Tx
+
+# Generic F303CBTx
+GenF3.menu.pnum.GENERIC_F303CBTX=Generic F303CBTx
+GenF3.menu.pnum.GENERIC_F303CBTX.upload.maximum_size=131072
+GenF3.menu.pnum.GENERIC_F303CBTX.upload.maximum_data_size=32768
+GenF3.menu.pnum.GENERIC_F303CBTX.build.board=GENERIC_F303CBTX
+GenF3.menu.pnum.GENERIC_F303CBTX.build.product_line=STM32F303xC
+GenF3.menu.pnum.GENERIC_F303CBTX.build.variant=STM32F3xx/F303C(B-C)Tx
+
+# Generic F303CCTx
+GenF3.menu.pnum.GENERIC_F303CCTX=Generic F303CCTx
+GenF3.menu.pnum.GENERIC_F303CCTX.upload.maximum_size=262144
+GenF3.menu.pnum.GENERIC_F303CCTX.upload.maximum_data_size=40960
+GenF3.menu.pnum.GENERIC_F303CCTX.build.board=GENERIC_F303CCTX
+GenF3.menu.pnum.GENERIC_F303CCTX.build.product_line=STM32F303xC
+GenF3.menu.pnum.GENERIC_F303CCTX.build.variant=STM32F3xx/F303C(B-C)Tx
+
+# Generic F303K6Tx
+GenF3.menu.pnum.GENERIC_F303K6TX=Generic F303K6Tx
+GenF3.menu.pnum.GENERIC_F303K6TX.upload.maximum_size=32768
+GenF3.menu.pnum.GENERIC_F303K6TX.upload.maximum_data_size=12288
+GenF3.menu.pnum.GENERIC_F303K6TX.build.board=GENERIC_F303K6TX
+GenF3.menu.pnum.GENERIC_F303K6TX.build.product_line=STM32F303x8
+GenF3.menu.pnum.GENERIC_F303K6TX.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
+
+# Generic F303K8Tx
+GenF3.menu.pnum.GENERIC_F303K8TX=Generic F303K8Tx
+GenF3.menu.pnum.GENERIC_F303K8TX.upload.maximum_size=65536
+GenF3.menu.pnum.GENERIC_F303K8TX.upload.maximum_data_size=12288
+GenF3.menu.pnum.GENERIC_F303K8TX.build.board=GENERIC_F303K8TX
+GenF3.menu.pnum.GENERIC_F303K8TX.build.product_line=STM32F303x8
+GenF3.menu.pnum.GENERIC_F303K8TX.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
+
+# Generic F303RDTx
+GenF3.menu.pnum.GENERIC_F303RDTX=Generic F303RDTx
+GenF3.menu.pnum.GENERIC_F303RDTX.upload.maximum_size=393216
+GenF3.menu.pnum.GENERIC_F303RDTX.upload.maximum_data_size=65536
+GenF3.menu.pnum.GENERIC_F303RDTX.build.board=GENERIC_F303RDTX
+GenF3.menu.pnum.GENERIC_F303RDTX.build.product_line=STM32F303xE
+GenF3.menu.pnum.GENERIC_F303RDTX.build.variant=STM32F3xx/F303R(D-E)Tx
+
+# Generic F303RETx
+GenF3.menu.pnum.GENERIC_F303RETX=Generic F303RETx
+GenF3.menu.pnum.GENERIC_F303RETX.upload.maximum_size=524288
+GenF3.menu.pnum.GENERIC_F303RETX.upload.maximum_data_size=65536
+GenF3.menu.pnum.GENERIC_F303RETX.build.board=GENERIC_F303RETX
+GenF3.menu.pnum.GENERIC_F303RETX.build.product_line=STM32F303xE
+GenF3.menu.pnum.GENERIC_F303RETX.build.variant=STM32F3xx/F303R(D-E)Tx
+
+# Generic F334K4Tx
+GenF3.menu.pnum.GENERIC_F334K4TX=Generic F334K4Tx
+GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_size=16384
+GenF3.menu.pnum.GENERIC_F334K4TX.upload.maximum_data_size=12288
+GenF3.menu.pnum.GENERIC_F334K4TX.build.board=GENERIC_F334K4TX
+GenF3.menu.pnum.GENERIC_F334K4TX.build.product_line=STM32F334x8
+GenF3.menu.pnum.GENERIC_F334K4TX.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
+
+# Generic F334K6Tx
+GenF3.menu.pnum.GENERIC_F334K6TX=Generic F334K6Tx
+GenF3.menu.pnum.GENERIC_F334K6TX.upload.maximum_size=32768
+GenF3.menu.pnum.GENERIC_F334K6TX.upload.maximum_data_size=12288
+GenF3.menu.pnum.GENERIC_F334K6TX.build.board=GENERIC_F334K6TX
+GenF3.menu.pnum.GENERIC_F334K6TX.build.product_line=STM32F334x8
+GenF3.menu.pnum.GENERIC_F334K6TX.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
+
+# Generic F334K8Tx
+GenF3.menu.pnum.GENERIC_F334K8TX=Generic F334K8Tx
+GenF3.menu.pnum.GENERIC_F334K8TX.upload.maximum_size=65536
+GenF3.menu.pnum.GENERIC_F334K8TX.upload.maximum_data_size=12288
+GenF3.menu.pnum.GENERIC_F334K8TX.build.board=GENERIC_F334K8TX
+GenF3.menu.pnum.GENERIC_F334K8TX.build.product_line=STM32F334x8
+GenF3.menu.pnum.GENERIC_F334K8TX.build.variant=STM32F3xx/F303K(6-8)Tx_F334K(4-6-8)Tx
 
 # Upload menu
 GenF3.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)
@@ -4480,7 +4568,8 @@ GenFlight.menu.pnum.Sparky_V1.build.cmsis_lib_gcc=arm_cortexM4lf_math
 GenFlight.menu.pnum.Sparky_V1.build.board=SPARKY_F303CC
 GenFlight.menu.pnum.Sparky_V1.build.product_line=STM32F303xC
 GenFlight.menu.pnum.Sparky_V1.build.flags.fp=-mfpu=fpv4-sp-d16 -mfloat-abi=hard
-GenFlight.menu.pnum.Sparky_V1.build.variant=STM32F3xx/SPARKY_F303CC
+GenFlight.menu.pnum.Sparky_V1.build.variant=STM32F3xx/F303C(B-C)Tx
+GenFlight.menu.pnum.Sparky_V1.build.peripheral_pins=-DCUSTOM_PERIPHERAL_PINS
 
 # Upload menu
 GenFlight.menu.upload_method.swdMethod=STM32CubeProgrammer (SWD)

diff --git a/variants/STM32F3xx/F302R(6-8)Tx/generic_clock.c b/variants/STM32F3xx/F302R(6-8)Tx/generic_clock.c
@@ -19,9 +19,72 @@
   * @retval None
   */
 WEAK void SystemClock_Config(void)
+#if defined(USBCON)
 {
-  /* SystemClock_Config can be generated by STM32CubeMX */
-#warning "SystemClock_Config() is empty. Default clock at reset is used."
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL12;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK) {
+    Error_Handler();
+  }
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.USBClockSelection = RCC_USBCLKSOURCE_PLL;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
+    Error_Handler();
+  }
+}
+#else
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    Error_Handler();
+  }
 }
+#endif /* USBCON */
 
 #endif /* ARDUINO_GENERIC_* */