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Data Structures

Rob Bocchino edited this page Jul 10, 2023 · 2 revisions

This page describes the data structures used in the implementation.

Topology

  1. Port: An FPP port, represented as a unique ID (a number).

  2. Port Kind: Input or Output.

  3. Syntactic Port: A triple (instanceName, portName, portNumber), also written as instanceName.portName[portNumber]. For example, timer.schedIn[0].

  4. Ports: A mapping from ports to syntactic ports.

  5. Port Map: A mapping from port numbers to ports.

  6. Instance: An FPP component instance. Each instance has the following members:

    1. name: The name of the instance.

    2. portMaps: A mapping from port kind to a mapping from port names to port maps. For example, the expression portMaps(Input)(schedIn)(0) returns the input port corresponding to port number 0 of port name schedIn.

  7. Connection: A connection between ports.

  8. ConnectionsTo: A mapping from output ports to input ports. connectionsTo(p) represents the unique port connected to p.

  9. ConnectionsFrom: A mapping from input ports to sets of output ports. connectionsFrom(p) represents the set of ports connected to p.

  10. Topology: A list of connections.

Layout

  1. Column Vector: A vector (immutable array) of columns to be displayed left to right in the drawing of a topology. The figure below shows a column vector with three columns.

  2. Column: A vector of column elements to be stacked vertically in the drawing of a topology. In the figure below, the second column from the left has three elements.

  3. Column Element: Each column element E has the following members:

    1. instance: An instance I to be displayed at the position in the vertical stack corresponding to E.

    2. ports: A mapping from port kind k to a vector containing the port vectors of I of kind k, in the order of display from top to bottom in the drawing.

    In the figure below, in column two, the second vertical element has the following members:

    • name is RateGroup2Comp.

    • ports(Input) has one element CycleIn.

    • CycleIn is a port vector of size 1 with contents [ 0 ].

    • ports(Output) has one element RateGroupMemberOut.

    • RateGroupMemberOut is a port vector of size 4 with contents [ 0, 1, 2, 3 ].

  4. Column Port Vector: A vector containing the connected port numbers associated with a port name, in numeric order.

Rate Group Topology
Figure 1. An example of a rendered column vector
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