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commit 211a364
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Sat Apr 8 23:28:03 2023 +0100

    remove device drivers .c

commit c06c4f3
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Sat Apr 8 23:18:35 2023 +0100

    modify analog joystick

commit 147dffb
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Sat Apr 8 22:17:14 2023 +0100

    adns5050 don't use defines for cpi

commit bd9d1f3
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Sat Apr 8 22:16:52 2023 +0100

    modify paw3204

commit 40728df
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Sat Apr 8 21:18:13 2023 +0100

    modify adns5050

commit 6be5286
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Fri Apr 7 21:40:29 2023 +0100

    sort counters and add miss report debug print

commit 33662c0
Author: Dasky <32983009+daskygit@users.noreply.github.com>
Date:   Fri Apr 7 15:39:02 2023 +0100

    thank you freznel
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@freznel10
freznel10 committed Apr 9, 2023
1 parent 77da8c1 commit d555248
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119 changes: 71 additions & 48 deletions drivers/sensors/adns5050.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -45,15 +45,21 @@
#define REG_MOTION_BURST 0x63
// clang-format on

void adns5050_init(void) {
const pointing_device_driver_t adns5050_driver_default = {.init = adns5050_init, .get_report = adns5050_get_report, .set_cpi = adns5050_set_cpi, .get_cpi = adns5050_get_cpi};
const adns5050_config_t adns5050_config_default = {.cs = ADNS5050_CS_PIN, .sclk = ADNS5050_SCLK_PIN, .sdio = ADNS5050_SDIO_PIN};


void adns5050_init(const void* config) {
adns5050_config_t* adns5050_config = (adns5050_config_t*)config;

// Initialize the ADNS serial pins.
setPinOutput(ADNS5050_SCLK_PIN);
setPinOutput(ADNS5050_SDIO_PIN);
setPinOutput(ADNS5050_CS_PIN);
setPinOutput(adns5050_config->sclk);
setPinOutput(adns5050_config->sdio);
setPinOutput(adns5050_config->cs);

// reboot the adns.
// if the adns hasn't initialized yet, this is harmless.
adns5050_write_reg(REG_CHIP_RESET, 0x5a);
adns5050_write_reg(adns5050_config, REG_CHIP_RESET, 0x5a);

// wait maximum time before adns is ready.
// this ensures that the adns is actuall ready after reset.
Expand All @@ -62,57 +68,57 @@ void adns5050_init(void) {
// read a burst from the adns and then discard it.
// gets the adns ready for write commands
// (for example, setting the dpi).
adns5050_read_burst();
adns5050_read_burst(adns5050_config);
}

// Perform a synchronization with the ADNS.
// Just as with the serial protocol, this is used by the slave to send a
// synchronization signal to the master.
void adns5050_sync(void) {
writePinLow(ADNS5050_CS_PIN);
void adns5050_sync(adns5050_config_t* adns5050_config) {
writePinLow(adns5050_config->cs);
wait_us(1);
writePinHigh(ADNS5050_CS_PIN);
writePinHigh(adns5050_config->cs);
}

void adns5050_cs_select(void) {
writePinLow(ADNS5050_CS_PIN);
void adns5050_cs_select(adns5050_config_t* adns5050_config) {
writePinLow(adns5050_config->cs);
}

void adns5050_cs_deselect(void) {
writePinHigh(ADNS5050_CS_PIN);
void adns5050_cs_deselect(adns5050_config_t* adns5050_config) {
writePinHigh(adns5050_config->cs);
}

uint8_t adns5050_serial_read(void) {
setPinInput(ADNS5050_SDIO_PIN);
uint8_t adns5050_serial_read(adns5050_config_t* adns5050_config) {
setPinInput(adns5050_config->sdio);
uint8_t byte = 0;

for (uint8_t i = 0; i < 8; ++i) {
writePinLow(ADNS5050_SCLK_PIN);
writePinLow(adns5050_config->sclk);
wait_us(1);

byte = (byte << 1) | readPin(ADNS5050_SDIO_PIN);
byte = (byte << 1) | readPin(adns5050_config->sdio);

writePinHigh(ADNS5050_SCLK_PIN);
writePinHigh(adns5050_config->sclk);
wait_us(1);
}

return byte;
}

void adns5050_serial_write(uint8_t data) {
setPinOutput(ADNS5050_SDIO_PIN);
void adns5050_serial_write(adns5050_config_t* adns5050_config, uint8_t data) {
setPinOutput(adns5050_config->sdio);

for (int8_t b = 7; b >= 0; b--) {
writePinLow(ADNS5050_SCLK_PIN);
writePinLow(adns5050_config->sclk);

if (data & (1 << b))
writePinHigh(ADNS5050_SDIO_PIN);
writePinHigh(adns5050_config->sdio);
else
writePinLow(ADNS5050_SDIO_PIN);
writePinLow(adns5050_config->sdio);

wait_us(2);

writePinHigh(ADNS5050_SCLK_PIN);
writePinHigh(adns5050_config->sclk);
}

// tSWR. See page 15 of the ADNS spec sheet.
Expand All @@ -126,56 +132,56 @@ void adns5050_serial_write(uint8_t data) {

// Read a byte of data from a register on the ADNS.
// Don't forget to use the register map (as defined in the header file).
uint8_t adns5050_read_reg(uint8_t reg_addr) {
adns5050_cs_select();
uint8_t adns5050_read_reg(adns5050_config_t* adns5050_config, uint8_t reg_addr) {
adns5050_cs_select(adns5050_config);

adns5050_serial_write(reg_addr);
adns5050_serial_write(adns5050_config, reg_addr);

// We don't need a minimum tSRAD here. That's because a 4ms wait time is
// already included in adns5050_serial_write(), so we're good.
// See page 10 and 15 of the ADNS spec sheet.
// wait_us(4);

uint8_t byte = adns5050_serial_read();
uint8_t byte = adns5050_serial_read(adns5050_config);

// tSRW & tSRR. See page 15 of the ADNS spec sheet.
// Technically, this is only necessary if the next operation is an SDIO
// read or write. This is not guaranteed to be the case.
// Honestly, this wait could probably be removed.
wait_us(1);

adns5050_cs_deselect();
adns5050_cs_deselect(adns5050_config);

return byte;
}

void adns5050_write_reg(uint8_t reg_addr, uint8_t data) {
adns5050_cs_select();
adns5050_serial_write(0b10000000 | reg_addr);
adns5050_serial_write(data);
adns5050_cs_deselect();
void adns5050_write_reg(adns5050_config_t* adns5050_config, uint8_t reg_addr, uint8_t data) {
adns5050_cs_select(adns5050_config);
adns5050_serial_write(adns5050_config, 0b10000000 | reg_addr);
adns5050_serial_write(adns5050_config, data);
adns5050_cs_deselect(adns5050_config);
}

report_adns5050_t adns5050_read_burst(void) {
adns5050_cs_select();
report_adns5050_t adns5050_read_burst(adns5050_config_t* adns5050_config) {
adns5050_cs_select(adns5050_config);

report_adns5050_t data;
data.dx = 0;
data.dy = 0;

adns5050_serial_write(REG_MOTION_BURST);
adns5050_serial_write(adns5050_config, REG_MOTION_BURST);

// We don't need a minimum tSRAD here. That's because a 4ms wait time is
// already included in adns5050_serial_write(), so we're good.
// See page 10 and 15 of the ADNS spec sheet.
// wait_us(4);

uint8_t x = adns5050_serial_read();
uint8_t y = adns5050_serial_read();
uint8_t x = adns5050_serial_read(adns5050_config);
uint8_t y = adns5050_serial_read(adns5050_config);

// Burst mode returns a bunch of other shit that we don't really need.
// Setting CS to high ends burst mode early.
adns5050_cs_deselect();
adns5050_cs_deselect(adns5050_config);

data.dx = convert_twoscomp(x);
data.dy = convert_twoscomp(y);
Expand All @@ -193,21 +199,38 @@ int8_t convert_twoscomp(uint8_t data) {
}

// Don't forget to use the definitions for CPI in the header file.
void adns5050_set_cpi(uint16_t cpi) {
void adns5050_set_cpi(const void* config, uint16_t cpi) {
adns5050_config_t* adns5050_config = (adns5050_config_t*)config;
uint8_t cpival = constrain((cpi / 125), 0x1, 0xD); // limits to 0--119

adns5050_write_reg(REG_MOUSE_CONTROL2, 0b10000 | cpival);
adns5050_write_reg(adns5050_config, REG_MOUSE_CONTROL2, 0b10000 | cpival);
}

uint16_t adns5050_get_cpi(void) {
uint8_t cpival = adns5050_read_reg(REG_MOUSE_CONTROL2);
uint16_t adns5050_get_cpi(const void* config) {
adns5050_config_t* adns5050_config = (adns5050_config_t*)config;
uint8_t cpival = adns5050_read_reg(adns5050_config, REG_MOUSE_CONTROL2);
return (uint16_t)((cpival & 0b10000) * 125);
}

bool adns5050_check_signature(void) {
uint8_t pid = adns5050_read_reg(REG_PRODUCT_ID);
uint8_t rid = adns5050_read_reg(REG_REVISION_ID);
uint8_t pid2 = adns5050_read_reg(REG_PRODUCT_ID2);
bool adns5050_check_signature(adns5050_config_t* adns5050_config) {
uint8_t pid = adns5050_read_reg(adns5050_config, REG_PRODUCT_ID);
uint8_t rid = adns5050_read_reg(adns5050_config, REG_REVISION_ID);
uint8_t pid2 = adns5050_read_reg(adns5050_config, REG_PRODUCT_ID2);

return (pid == 0x12 && rid == 0x01 && pid2 == 0x26);
}

report_mouse_t adns5050_get_report(const void* config) {
adns5050_config_t* adns5050_config = (adns5050_config_t*)config;

report_adns5050_t data = adns5050_read_burst(adns5050_config);
report_mouse_t mouse_report = {0};

if (data.dx != 0 || data.dy != 0) {
pd_dprintf("Raw ] X: %d, Y: %d\n", data.dx, data.dy);
mouse_report.x = (mouse_xy_report_t)data.dx;
mouse_report.y = (mouse_xy_report_t)data.dy;
}

return mouse_report;
}
86 changes: 37 additions & 49 deletions drivers/sensors/adns5050.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,65 +21,53 @@

#include <stdbool.h>
#include <stdint.h>
#include "pointing_device.h"

// CPI values
// clang-format off
#define CPI125 0x11
#define CPI250 0x12
#define CPI375 0x13
#define CPI500 0x14
#define CPI625 0x15
#define CPI750 0x16
#define CPI875 0x17
#define CPI1000 0x18
#define CPI1125 0x19
#define CPI1250 0x1a
#define CPI1375 0x1b
// clang-format on
enum adns5050_cpi {
ADNS5050_CPI125 = 0x11,
ADNS5050_CPI250 = 0x12,
ADNS5050_CPI375 = 0x13,
ADNS5050_CPI500 = 0x14,
ADNS5050_CPI625 = 0x15,
ADNS5050_CPI750 = 0x16,
ADNS5050_CPI875 = 0x17,
ADNS5050_CPI1000 = 0x18,
ADNS5050_CPI1125 = 0x19,
ADNS5050_CPI1250 = 0x1a,
ADNS5050_CPI1375 = 0x1b,
};

#define constrain(amt, low, high) ((amt) < (low) ? (low) : ((amt) > (high) ? (high) : (amt)))

// Definitions for the ADNS serial line.
#ifndef ADNS5050_SCLK_PIN
# ifdef POINTING_DEVICE_SCLK_PIN
# define ADNS5050_SCLK_PIN POINTING_DEVICE_SCLK_PIN
# else
# error "No clock pin defined -- missing POINTING_DEVICE_SCLK_PIN or ADNS5050_SCLK_PIN"
# endif
#endif

#ifndef ADNS5050_SDIO_PIN
# ifdef POINTING_DEVICE_SDIO_PIN
# define ADNS5050_SDIO_PIN POINTING_DEVICE_SDIO_PIN
# else
# error "No data pin defined -- missing POINTING_DEVICE_SDIO_PIN or ADNS5050_SDIO_PIN"
# endif
#endif

#ifndef ADNS5050_CS_PIN
# ifdef POINTING_DEVICE_CS_PIN
# define ADNS5050_CS_PIN POINTING_DEVICE_CS_PIN
# else
# error "No chip select pin defined -- missing POINTING_DEVICE_CS_PIN or ADNS5050_CS_PIN define"
# endif
#endif

typedef struct {
int8_t dx;
int8_t dy;
} report_adns5050_t;

typedef struct {
pin_t sdio;
pin_t sclk;
pin_t cs;
} adns5050_config_t;

const pointing_device_driver_t adns5050_driver_default;

#if defined(ADNS5050_SCLK_PIN) & defined(ADNS5050_SDIO_PIN) & defined(ADNS5050_CS_PIN)
const adns5050_config_t adns5050_config_default;
#endif

// A bunch of functions to implement the ADNS5050-specific serial protocol.
// Note that the "serial.h" driver is insufficient, because it does not
// manually manipulate a serial clock signal.
void adns5050_init(void);
void adns5050_sync(void);
uint8_t adns5050_serial_read(void);
void adns5050_serial_write(uint8_t data);
uint8_t adns5050_read_reg(uint8_t reg_addr);
void adns5050_write_reg(uint8_t reg_addr, uint8_t data);
report_adns5050_t adns5050_read_burst(void);
void adns5050_set_cpi(uint16_t cpi);
uint16_t adns5050_get_cpi(void);
void adns5050_init(const void* config);
void adns5050_sync(adns5050_config_t* adns5050_config);
uint8_t adns5050_serial_read(adns5050_config_t* adns5050_config);
void adns5050_serial_write(adns5050_config_t* adns5050_config, uint8_t data);
uint8_t adns5050_read_reg(adns5050_config_t* adns5050_config, uint8_t reg_addr);
void adns5050_write_reg(adns5050_config_t* adns5050_config, uint8_t reg_addr, uint8_t data);
report_adns5050_t adns5050_read_burst(adns5050_config_t* adns5050_config);
void adns5050_set_cpi(const void* config, uint16_t cpi);
uint16_t adns5050_get_cpi(const void* config);
int8_t convert_twoscomp(uint8_t data);
bool adns5050_check_signature(void);
bool adns5050_check_signature(adns5050_config_t* adns5050_config);
report_mouse_t adns5050_get_report(const void* config);
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