One of the most important elements of computing systems is the Universal Shift Register(USR) which is capable of both unidirectional and bidirectional shifting along with parallel loading. Designing, implementing, and simulating this component from scratch is quite challenging as it requires a good grasp of the logical working of registers in addition to the programming requirements to do so.
The logical components are configured as shown in the following image,
Simulating a small-scale 4-bit version provides enough sophistication to ensure conceptual integrity as well as practicality. The construction and operation of digital logic circuits are described using the specialized computer language known as hardware description language(HDL). HDL offers little to no abstraction enabling us to directly achieve the desired task.
The following HDL instance corresponds to the PIPO(Parallel In Parallel Out) illustration,
This project allowed me to realize the complexities of even the most simple components used in pretty much every modern Computing devices.
The Documentation of this project can be found Here
The HDL code files of the corresponding parts in report can be found Here
The Logisim simulation of the step by step working can found Here
Prerequisites