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GT Synergy Lab

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  1. SIGMA SIGMA Public

    RTL implementation of Flex-DPE.

    Verilog 91 27

  2. hardtaco-hls hardtaco-hls Public

    HLS project modeling various sparse accelerators.

    C++ 11 1

  3. astra-sim astra-sim Public

    ASTRA-sim DNN training simulator

    7 2

  4. CLAMP-ViT CLAMP-ViT Public

    [ECCV 2024] CLAMP-ViT: Contrastive Data-Free Learning for Adaptive Post-Training Quantization of ViTs

    Python 7

  5. LogarithmicPosit LogarithmicPosit Public

    [DAC'24] Official Implementation of the Logarithmic Posit (LP) Number System

    2

  6. IARPA-sst-elements IARPA-sst-elements Public

    C++

Repositories

Showing 8 of 8 repositories
  • Privatar Public
    georgia-tech-synergy-lab/Privatar’s past year of commit activity
    Jupyter Notebook 0 0 0 0 Updated Sep 5, 2024
  • CLAMP-ViT Public

    [ECCV 2024] CLAMP-ViT: Contrastive Data-Free Learning for Adaptive Post-Training Quantization of ViTs

    georgia-tech-synergy-lab/CLAMP-ViT’s past year of commit activity
    Python 7 MIT 0 1 0 Updated Jul 2, 2024
  • LogarithmicPosit Public

    [DAC'24] Official Implementation of the Logarithmic Posit (LP) Number System

    georgia-tech-synergy-lab/LogarithmicPosit’s past year of commit activity
    2 MIT 0 0 0 Updated Mar 20, 2024
  • IARPA-sst-elements Public
    georgia-tech-synergy-lab/IARPA-sst-elements’s past year of commit activity
    C++ 0 0 0 0 Updated Jan 9, 2024
  • IARPA-sst-scripts Public
    georgia-tech-synergy-lab/IARPA-sst-scripts’s past year of commit activity
    Python 0 0 0 0 Updated Jan 9, 2024
  • hardtaco-hls Public

    HLS project modeling various sparse accelerators.

    georgia-tech-synergy-lab/hardtaco-hls’s past year of commit activity
    C++ 11 1 0 0 Updated Jan 11, 2022
  • astra-sim Public

    ASTRA-sim DNN training simulator

    georgia-tech-synergy-lab/astra-sim’s past year of commit activity
    7 2 0 0 Updated Aug 23, 2020
  • SIGMA Public

    RTL implementation of Flex-DPE.

    georgia-tech-synergy-lab/SIGMA’s past year of commit activity
    Verilog 91 27 0 0 Updated Feb 22, 2020

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