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Support DXR in wgpu-hal & naga. #6777
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…tracing # Conflicts: # naga/src/back/hlsl/writer.rs # wgpu-hal/src/dx12/device.rs
…RUCTURE` as we don't yet support enhanced barriers for acceleration structures
I ran the tests for this and it doesn't appear to be working properly? (6800xt/RDNA2 has RT support, I ran
edit: This is probably #6728, I'll try reverting that and see if it works. edit2: Nope, reverted that and it's now saying edit3: Looks like you need to set the |
This should now default to static-dxc after #6730 |
Since that's on a AMD GPU, that means that this probably does provide an alternative (and may also point to the issue being a wgpu bug vs a AMD bug) Edit: I'm not sure what GPU generations were being affected though. |
Same, my 7800xtx passes all tests |
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Super cool to see! Lots of comments, but nothing show stopping!
wgpu-hal/src/dx12/command.rs
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Triangles: Direct3D12::D3D12_RAYTRACING_GEOMETRY_TRIANGLES_DESC { | ||
Transform3x4: triangle.transform.as_ref().map_or( | ||
0, | ||
|transform| unsafe { | ||
transform.buffer.resource.GetGPUVirtualAddress() | ||
+ transform.offset as u64 | ||
}, | ||
), | ||
IndexFormat: triangle | ||
.indices | ||
.as_ref() | ||
.map_or(Dxgi::Common::DXGI_FORMAT_UNKNOWN, |indices| { | ||
conv::map_index_format(indices.format) | ||
}), | ||
VertexFormat: conv::map_acceleration_structure_vertex_format( | ||
triangle.vertex_format, | ||
), | ||
IndexCount: triangle | ||
.indices | ||
.as_ref() | ||
.map_or(0, |indices| indices.count), | ||
VertexCount: triangle.vertex_count, | ||
IndexBuffer: triangle.indices.as_ref().map_or( | ||
0, | ||
|indices| unsafe { | ||
indices | ||
.buffer | ||
.expect("needs buffer to build") | ||
.resource | ||
.GetGPUVirtualAddress() | ||
+ indices.offset as u64 | ||
}, | ||
), |
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Can we pull all of these complex assignments out of the struct init and make them local variables in the for loop - we can then have a place for computation and a place for initializing the struct. Should help reduce rightward creep too.
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This applies broadly for other places in the PR too - give a pass over and see if right shift can be reduced.
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I think I've addressed this here (and also in the similar version in get_acceleration_structure_build_sizes
), but you may have a different opinion. I'll keep this unresolved.
Connections
Might provide alternatives for #6727?
Description
This adds support for DXR in wgpu-hal. Also removes an unnecessary feature requirement from ray_cube_compute as this was preventing it from running on DX12. Also adds support for HLSL raytracing because naga didn't have that either.
Testing
this only extends feature support to dx12 so all previous rt tests work.
Checklist
cargo fmt
.taplo format
.cargo clippy
. If applicable, add:--target wasm32-unknown-unknown
--target wasm32-unknown-emscripten
cargo xtask test
to run tests.CHANGELOG.md
. See simple instructions inside file.