cmd/asm: on PPC64, allow ISEL to accept a CR bit arg

Using the CR bit register arguments makes it more easy to understand which condition and CR field is being tested when using ISEL. Likewise, cleanup optab setup for ISEL. ISEL should only accept a 5 bit unsigned constant (C_U5CON), and C_ZCON arguments are accepted by a C_U5CON optab arg. Change-Id: I2495dbe3595dd3f16c510b3492a88133af9f7e1a Reviewed-on: https://go-review.googlesource.com/c/go/+/402375 Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com> Run-TryBot: Paul Murphy <murp@ibm.com> Reviewed-by: Cherry Mui <cherryyz@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Dmitri Shuralyov <dmitshur@google.com>
golang · May 4, 2022 · 2f23364 · 2f23364
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commit 2f23364
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Showing 2 changed files with 15 additions and 6 deletions.
diff --git a/src/cmd/asm/internal/asm/testdata/ppc64.s b/src/cmd/asm/internal/asm/testdata/ppc64.s
@@ -351,11 +351,18 @@ TEXT asmtest(SB),DUPOK|NOSPLIT,$0
 	CRORN CR0GT, CR0EQ, CR0SO       // 4c620b42
 	CRXOR CR0GT, CR0EQ, CR0SO       // 4c620982
 
-	ISEL $1, R3, R4, R5             // 7ca3205e
 	ISEL $0, R3, R4, R5             // 7ca3201e
+	ISEL $1, R3, R4, R5             // 7ca3205e
 	ISEL $2, R3, R4, R5             // 7ca3209e
 	ISEL $3, R3, R4, R5             // 7ca320de
 	ISEL $4, R3, R4, R5             // 7ca3211e
+	ISEL $31, R3, R4, R5            // 7ca327de
+	ISEL CR0LT, R3, R4, R5          // 7ca3201e
+	ISEL CR0GT, R3, R4, R5          // 7ca3205e
+	ISEL CR0EQ, R3, R4, R5          // 7ca3209e
+	ISEL CR0SO, R3, R4, R5          // 7ca320de
+	ISEL CR1LT, R3, R4, R5          // 7ca3211e
+	ISEL CR7SO, R3, R4, R5          // 7ca327de
 	POPCNTB R3, R4                  // 7c6400f4
 	POPCNTW R3, R4                  // 7c6402f4
 	POPCNTD R3, R4                  // 7c6403f4

diff --git a/src/cmd/internal/obj/ppc64/asm9.go b/src/cmd/internal/obj/ppc64/asm9.go
@@ -313,8 +313,8 @@ var optab = []Optab{
 	{as: AADDME, a1: C_REG, a6: C_REG, type_: 47, size: 4},
 	{as: AEXTSB, a1: C_REG, a6: C_REG, type_: 48, size: 4},
 	{as: AEXTSB, a6: C_REG, type_: 48, size: 4},
-	{as: AISEL, a1: C_LCON, a2: C_REG, a3: C_REG, a6: C_REG, type_: 84, size: 4},
-	{as: AISEL, a1: C_ZCON, a2: C_REG, a3: C_REG, a6: C_REG, type_: 84, size: 4},
+	{as: AISEL, a1: C_U5CON, a2: C_REG, a3: C_REG, a6: C_REG, type_: 84, size: 4},
+	{as: AISEL, a1: C_CRBIT, a2: C_REG, a3: C_REG, a6: C_REG, type_: 84, size: 4},
 	{as: ANEG, a1: C_REG, a6: C_REG, type_: 47, size: 4},
 	{as: ANEG, a6: C_REG, type_: 47, size: 4},
 	{as: AREM, a1: C_REG, a6: C_REG, type_: 50, size: 12},
@@ -1876,9 +1876,6 @@ func buildop(ctxt *obj.Link) {
 		case AFCMPO:
 			opset(AFCMPU, r0)
 
-		case AISEL:
-			opset(AISEL, r0)
-
 		case AMTFSB0:
 			opset(AMTFSB0CC, r0)
 			opset(AMTFSB1, r0)
@@ -2042,6 +2039,7 @@ func buildop(ctxt *obj.Link) {
 			ACLRLSLWI,
 			AMTVSRDD,
 			APNOP,
+			AISEL,
 			obj.ANOP,
 			obj.ATEXT,
 			obj.AUNDEF,
@@ -3610,6 +3608,10 @@ func (c *ctxt9) asmout(p *obj.Prog, o *Optab, out []uint32) {
 
 	case 84: // ISEL BC,RA,RB,RT -> isel rt,ra,rb,bc
 		bc := c.vregoff(&p.From)
+		if o.a1 == C_CRBIT {
+			// CR bit is encoded as a register, not a constant.
+			bc = int64(p.From.Reg)
+		}
 
 		// rt = To.Reg, ra = p.Reg, rb = p.From3.Reg
 		o1 = AOP_ISEL(OP_ISEL, uint32(p.To.Reg), uint32(p.Reg), uint32(p.GetFrom3().Reg), uint32(bc))