ASoC: samsung: check return value of clk_set_parent()

If the clock hierarchy can not be set up correctly in the daisy_max98095
driver, audio playback and recording will not work.  Instead of simply
printing a warning and continuing on, return an error so that probe of
the daisy_max98095 driver fails.

BUG=chrome-os-partner:18720
TEST=Build and boot on peach-pit-rev2; audio still works.

Original-Change-Id: Ic3f17e1ece3bef9bf87094ade4b8e26f0ace4d36
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-on: https://gerrit-int.chromium.org/37896
Reviewed-by: Simon Glass <sjg@google.com>
Commit-Queue: Andrew Bresticker <abrestic@google.com>
Tested-by: Andrew Bresticker <abrestic@google.com>
(cherry picked from peach-alpha commit
	b1d296a2bbf7d3ad7bcecdddd05f4f3643c854a3)

Change-Id: I4cea280d87cae29b36a1b8a4740af60c2dd5b104
Reviewed-on: https://gerrit.chromium.org/gerrit/58420
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Andrew Bresticker <abrestic@chromium.org>
Commit-Queue: Andrew Bresticker <abrestic@chromium.org>

sound/soc/samsung/daisy_max98095.c

@@ -118,14 +118,26 @@ static int set_audio_clock_heirachy(struct platform_device *pdev)
 	}
 
 	/* Set audio clock hierarchy for S/PDIF */
-	if (clk_set_parent(sclk_epll, fout_epll))
+	ret = clk_set_parent(sclk_epll, fout_epll);
+	if (ret < 0) {
 		printk(KERN_WARNING "Failed to set parent of epll.\n");
-	if (clk_set_parent(mout_audio0, sclk_epll))
+		goto out6;
+	}
+	ret = clk_set_parent(mout_audio0, sclk_epll);
+	if (ret < 0) {
 		printk(KERN_WARNING "Failed to set parent of mout audio0.\n");
-	if (clk_set_parent(mout_audss, fout_epll))
+		goto out6;
+	}
+	ret = clk_set_parent(mout_audss, fout_epll);
+	if (ret < 0) {
 		printk(KERN_WARNING "Failed to set parent of audss.\n");
-	if (clk_set_parent(mout_i2s, sclk_audio0))
+		goto out6;
+	}
+	ret = clk_set_parent(mout_i2s, sclk_audio0);
+	if (ret < 0) {
 		printk(KERN_WARNING "Failed to set parent of mout i2s.\n");
+		goto out6;
+	}
 
 	/* Ensure that the divider between mout_audio0 and sclk_audio0 is 1. */
 	ret = clk_set_rate(sclk_audio0, clk_get_rate(mout_audio0));