Folder organization:

1. IP Repo - rfsoc_nrssb/boards/ip/iprepo at main · himanshudutta11/rfsoc_nrssb (github.com)
2. TCL scripts : rfsoc_nrssb/boards/RFSoC2x2/rfsoc_nrssb at main · himanshudutta11/rfsoc_nrssb (github.com)
3. Bitstream - rfsoc_nrssb/boards/RFSoC2x2/rfsoc_nrssb/bitstream.zip at main · himanshudutta11/rfsoc_nrssb (github.com)
4. Python files for PYNQ framesworks - rfsoc_nrssb/rfsoc_nrssb at main · himanshudutta11/rfsoc_nrssb (github.com)
5. Jupyter Notebooks - rfsoc_nrssb/notebooks at main · himanshudutta11/rfsoc_nrssb (github.com)

The steps involved:

1. Simulink Model – SSB Detect

2. HDL Code generation

3. IP Core generation

4. Block Design and interconnection

5. Bitstream generation Bitstream is generated through the script - rfsoc_nrssb/boards/RFSoC2x2/rfsoc_nrssb/make_bitstream.tcl

6. Invoking IPs from PYNQ framework