Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

feat: add sent reason for late arriving spans #936

Merged
merged 10 commits into from
Dec 13, 2023
Merged

Conversation

VinozzZ
Copy link
Contributor

@VinozzZ VinozzZ commented Dec 6, 2023

Which problem is this PR solving?

Short description of the changes

This PR adds a new cache for send_reasons that Refinery produces for a given configuration.
The new cache acts as a mapping between the string representation of send reason and a uint.
The cache is used to reduce the memory footprint of the trace cache.

I made the design based on the assumption that the send reason has a low cardinality for a given configuration.
We decided not to clear out the cache on config reload so that we can avoid needing a lock on read operation.

fix #835

@VinozzZ VinozzZ force-pushed the yingrong.sent_reason_cache branch 3 times, most recently from f8c9b61 to 6fa5c01 Compare December 11, 2023 15:38
@VinozzZ VinozzZ marked this pull request as ready for review December 11, 2023 17:52
@VinozzZ VinozzZ requested a review from a team as a code owner December 11, 2023 17:52
@VinozzZ VinozzZ marked this pull request as draft December 11, 2023 17:55
@VinozzZ VinozzZ marked this pull request as ready for review December 11, 2023 19:11
@VinozzZ VinozzZ force-pushed the yingrong.sent_reason_cache branch 2 times, most recently from d89cab8 to 904af23 Compare December 12, 2023 23:15
Copy link
Contributor

@kentquirk kentquirk left a comment

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I just want to note that we went over this on a call and the benchmarks showed that this cache design is extremely fast, since it's lockless on read. We also tested for race conditions in parallel operation.

@VinozzZ VinozzZ force-pushed the yingrong.sent_reason_cache branch from c7f7043 to e4a8320 Compare December 13, 2023 15:28
@VinozzZ VinozzZ merged commit 97751f3 into main Dec 13, 2023
3 checks passed
@VinozzZ VinozzZ deleted the yingrong.sent_reason_cache branch December 13, 2023 15:38
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

Please provide a more descriptive reason for late-arriving spans
2 participants