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A SPI design (supporting APB interfaces) using Systemverilog from VG_CPU project

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Name		Name	Last commit message	Last commit date
Latest commit History 66 Commits
ref		ref
rtl		rtl
sim		sim
tb		tb
uvm		uvm
README.md		README.md
SPISpec_VLSI_Technology_public.pdf		SPISpec_VLSI_Technology_public.pdf

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SPI_APB

A SPI design (supporting APB interfaces) using Systemverilog

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A SPI design (supporting APB interfaces) using Systemverilog from VG_CPU project

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