Merge pull request #304 from Sacul231/master

Updating circom to version 2.2.0: including buses and other extensions

RELEASES.md

@@ -1,4 +1,24 @@
 # Release notes
+## October 04, 2024 circom 2.2.0
+#### New features
+- Buses: more information [here](https://github.com/iden3/circom/blob/master/mkdocs/docs/circom-language/buses.md).
+
+#### Changes
+- input/output keywords are the first token in declarations (though having it after "signal" is still accepted).
+- The default option for constraint simplification is --O1 (instead of --O2 which was the default until now). More information in [here](https://github.com/iden3/circom/blob/master/mkdocs/docs/circom-language/circom-insight/simplification.md).
+
+#### Extensions
+- Allowing array assignments of different sizes. 
+- Improving error reports when parsing.
+- Improving documentation.
+
+#### Fixed bugs
+- Main with no inputs is now executed once.
+- Fixing complement function to depend on the prime number used.
+- Applying modulo prime number to any constant in the circuit.
+- Fixing minor panic: the number of signals passed to the anonymous component must be equal to the actual number of inputs.
+
+
 ## April 23, 2024 circom 2.1.9
 
 #### Extensions 

circom/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "circom"
-version = "2.1.9"
+version = "2.2.0"
 authors = ["Costa Group UCM","iden3"]
 edition = "2018"
 

circom/src/input_user.rs

@@ -264,8 +264,8 @@ mod input_processing {
                 else { Result::Err(eprintln!("{}", Colour::Red.paint("invalid number of rounds"))) }
             },
 
-            (false, false, false, true) => Ok(SimplificationStyle::O2(usize::MAX)),
-            (false, false, false, false) => Ok(SimplificationStyle::O2(usize::MAX)),
+            (false, false, false, true) => Ok(SimplificationStyle::O1),
+            (false, false, false, false) => Ok(SimplificationStyle::O1),
         }
     }
 

circom_algebra/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "circom_algebra"
-version = "2.1.4"
+version = "2.2.0"
 authors = ["Costa Group UCM","iden3"]
 edition = "2018"
 

code_producers/Cargo.toml

@@ -1,6 +1,6 @@
 [package]
 name = "code_producers"
-version = "2.1.9"
+version = "2.2.0"
 authors = ["Costa Group UCM","iden3"]
 edition = "2018"
 

code_producers/src/c_elements/c_code_generator.rs

@@ -18,8 +18,9 @@ const CIRCOM_HASH_ENTRY_FIELDS: [&str; 3] = ["hash", "signalid", "signalsize"];
 const S_CIRCOM_COMPONENT: &str = "Circom_Component";
 const CIRCOM_COMPONENT_FIELDS: [&str; 4] =
     ["templateID", "signalStart", "inputCounter", "subcomponents"];
-const S_IO_DEF: &str = "IODef";
-const IO_DEF_FIELDS: [&str; 2] = ["offset", "lengths"];
+const S_IOFIELD_DEF: &str = "IOFieldDef";
+const IOFIELD_DEF_FIELDS: [&str; 4] = ["offset", "size", "lengths", "busid"];
+
 
 // Global variables
 //pub const SIZE_INPUT_HASHMAP: usize = 256;
@@ -143,6 +144,11 @@ pub fn template_ins_2_io_info() -> CInstruction {
     format!("{}", TEMP_INS_2_IO_INFO)
 }
 
+pub const BUS_INS_2_FIELD_INFO: &str = "busInsId2FieldInfo";
+pub fn bus_ins_2_field_info() -> CInstruction {
+    format!("{}", BUS_INS_2_FIELD_INFO)
+}
+
 pub fn template_id_in_component(idx: CInstruction) -> CInstruction {
     format!("{}->componentMemory[{}].templateId", CIRCOM_CALC_WIT, idx)
 }
@@ -264,7 +270,7 @@ pub fn my_input_counter() -> CInstruction {
 pub const TEMPLATE_INS_ID_2_IO_SIGNAL_INFO: &str = "templateInsId2IOSignalInfo";
 pub fn declare_template_ins_id_2_io_signal_info() -> CInstruction {
     format!(
-        "std::map<u32,IODefPair> {} = {}->{}",
+        "std::map<u32,IOFieldDefPair> {} = {}->{}",
         TEMPLATE_INS_ID_2_IO_SIGNAL_INFO, CIRCOM_CALC_WIT, TEMPLATE_INS_ID_2_IO_SIGNAL_INFO
     )
 }
@@ -371,6 +377,16 @@ pub fn set_list(elems: Vec<usize>) -> String {
     set_string
 }
 
+pub fn set_list_tuple(elems: Vec<(usize, usize)>) -> String {
+    let mut set_string = "{".to_string();
+    for (elem_a, elem_b) in elems {
+        set_string = format!("{}{{{},{}}},", set_string, elem_a, elem_b);
+    }
+    set_string.pop();
+    set_string .push('}');
+    set_string
+}
+
 pub fn set_list_bool(elems: Vec<bool>) -> String {
     let mut set_string = "{".to_string();
     for elem in elems {
@@ -469,16 +485,16 @@ pub fn collect_function_headers(functions: Vec<String>) -> Vec<String> {
 
 //--------------- generate all kinds of Data for the .dat file ---------------
 
-pub fn generate_hash_map(signal_name_list: &Vec<(String, usize, usize)>, size: usize) -> Vec<(u64, u64, u64)> {
+pub fn generate_hash_map(signal_name_list: &Vec<InputInfo>, size: usize) -> Vec<(u64, u64, u64)> {
     assert!(signal_name_list.len() <= size);
     let mut hash_map = vec![(0, 0, 0); size];
     for i in 0..signal_name_list.len() {
-        let h = hasher(&signal_name_list[i].0);
+        let h = hasher(&signal_name_list[i].name);
         let mut p = h as usize % size;
         while hash_map[p].1 != 0 {
             p = (p + 1) % size;
         }
-        hash_map[p] = (h, signal_name_list[i].1 as u64, signal_name_list[i].2 as u64);
+        hash_map[p] = (h, signal_name_list[i].start as u64, signal_name_list[i].size as u64);
     }
     hash_map
 }
@@ -617,11 +633,79 @@ pub fn generate_dat_io_signals_info(
                 v.reverse();
                 io_signals_info.append(&mut v);
             }
+            let s32 = s.size as u32;
+            let mut v: Vec<u8> = s32.to_be_bytes().to_vec();
+            v.reverse();
+            io_signals_info.append(&mut v);
+	    let b32 = if let Some(value) = s.bus_id {
+		value as u32
+	    } else {
+		0 as u32
+	    };
+	    let mut v = b32.to_be_bytes().to_vec();
+	    v.reverse();
+	    io_signals_info.append(&mut v);
         }
     }
     io_signals_info
 }
 
+pub fn generate_dat_bus_field_info(
+    _producer: &CProducer,
+    field_map: &FieldMap,
+) -> Vec<u8> {
+    // println!("size: {}",field_map.len());
+    let mut bus_field_info = vec![];
+    //let t32 = field_map.len() as u32;
+    //let mut v: Vec<u8> = t32.to_be_bytes().to_vec();
+    //v.reverse();
+    //bus_field_info.append(&mut v);
+    for c in 0..field_map.len() {
+        //println!("field_def_len: {}",field_map[c].len());
+        let l32 = field_map[c].len() as u32;
+        let mut v: Vec<u8> = l32.to_be_bytes().to_vec();
+        v.reverse();
+        bus_field_info.append(&mut v);
+        for s in &field_map[c] {
+            //println!("offset: {}",s.offset);
+            let l32 = s.offset as u32;
+            let mut v: Vec<u8> = l32.to_be_bytes().to_vec();
+            v.reverse();
+            bus_field_info.append(&mut v);
+            let n32: u32;
+            if s.dimensions.len() > 0 {
+                n32 = (s.dimensions.len() - 1) as u32;
+            } else {
+                n32 = 0;
+            }
+            // println!("dims-1: {}",n32);
+            let mut v: Vec<u8> = n32.to_be_bytes().to_vec();
+            v.reverse();
+            bus_field_info.append(&mut v);
+            for i in 1..s.dimensions.len() {
+                // println!("dims {}: {}",i,s.lengths[i]);
+                let pos = s.dimensions[i] as u32;
+                let mut v: Vec<u8> = pos.to_be_bytes().to_vec();
+                v.reverse();
+                bus_field_info.append(&mut v);
+            }
+            let s32 = s.size as u32;
+            let mut v: Vec<u8> = s32.to_be_bytes().to_vec();
+            v.reverse();
+            bus_field_info.append(&mut v);
+	    let b32 = if let Some(value) = s.bus_id {
+		value as u32
+	    } else {
+		0 as u32
+	    };
+	    let mut v = b32.to_be_bytes().to_vec();
+	    v.reverse();
+	    bus_field_info.append(&mut v);
+        }
+    }
+    bus_field_info
+}
+
 // in main fix one to 1
 
 /*
@@ -651,8 +735,11 @@ pub fn generate_dat_file(dat_file: &mut dyn Write, producer: &CProducer) -> std:
     //dfile.write_all(&p)?;
     //dfile.flush()?;
 
+//<<<<<<< HEAD
+//=======
     let aux = producer.get_main_input_list();
     let map = generate_hash_map(&aux,producer.get_input_hash_map_entry_size());
+//>>>>>>> 9f3da35a8ac3107190f8c85c8cf3ea1a0f8780a4
     let hashmap = generate_dat_from_hash_map(&map); //bytes u64 --> u64
                                                     //let hml = producer.get_input_hash_map_entry_size() as u32;
                                                     //dfile.write_all(&hml.to_be_bytes())?;
@@ -670,6 +757,11 @@ pub fn generate_dat_file(dat_file: &mut dyn Write, producer: &CProducer) -> std:
     //dfile.write_all(&ioml.to_be_bytes())?;
     let iomap = generate_dat_io_signals_info(&producer, producer.get_io_map());
     dat_file.write_all(&iomap)?;
+    if producer.get_io_map().len() > 0 {
+	//otherwise it is not used
+	let fieldmap = generate_dat_bus_field_info(&producer, producer.get_busid_field_info());
+	dat_file.write_all(&fieldmap)?;
+    }
     /*
         let ml = producer.get_message_list();
         let mll = ml.len() as u64;
@@ -681,7 +773,7 @@ pub fn generate_dat_file(dat_file: &mut dyn Write, producer: &CProducer) -> std:
             dfile.write_all(m)?;
             dfile.flush()?;
         }
-    */
+     */
     dat_file.flush()?;
     Ok(())
 }
@@ -979,6 +1071,7 @@ pub fn generate_c_file(name: String, producer: &CProducer) -> std::io::Result<()
         producer.get_field_constant_list().len()
     ));
     code.push(format!("uint get_size_of_io_map() {{return {};}}\n", producer.get_io_map().len()));
+    code.push(format!("uint get_size_of_bus_field_map() {{return {};}}\n", producer.get_busid_field_info().len()));
 
     // let mut ml_def = generate_message_list_def(producer, producer.get_message_list());
     // code.append(&mut ml_def);

code_producers/src/c_elements/common/calcwit.cpp

@@ -35,6 +35,7 @@ Circom_CalcWit::Circom_CalcWit (Circom_Circuit *aCircuit, uint maxTh) {
   componentMemory = new Circom_Component[get_number_of_components()];
   circuitConstants = circuit ->circuitConstants;
   templateInsId2IOSignalInfo = circuit -> templateInsId2IOSignalInfo;
+  busInsId2FieldInfo = circuit -> busInsId2FieldInfo;
 
   maxThread = maxTh;
 

code_producers/src/c_elements/common/calcwit.hpp

@@ -26,7 +26,8 @@ class Circom_CalcWit {
   FrElement *signalValues;
   Circom_Component* componentMemory;
   FrElement* circuitConstants; 
-  std::map<u32,IODefPair> templateInsId2IOSignalInfo; 
+  std::map<u32,IOFieldDefPair> templateInsId2IOSignalInfo; 
+  IOFieldDefPair* busInsId2FieldInfo;
   std::string* listOfTemplateMessages; 
 
   // parallelism

code_producers/src/c_elements/common/circom.hpp

@@ -20,23 +20,26 @@ struct __attribute__((__packed__)) HashSignalInfo {
     u64 signalsize; 
 };
 
-struct IODef { 
+struct IOFieldDef { 
     u32 offset;
     u32 len;
     u32 *lengths;
+    u32 size;
+    u32 busId;
 };
 
-struct IODefPair { 
+struct IOFieldDefPair { 
     u32 len;
-    IODef* defs;
+    IOFieldDef* defs;
 };
 
 struct Circom_Circuit {
   //  const char *P;
   HashSignalInfo* InputHashMap;
   u64* witness2SignalList;
   FrElement* circuitConstants;  
-  std::map<u32,IODefPair> templateInsId2IOSignalInfo;
+  std::map<u32,IOFieldDefPair> templateInsId2IOSignalInfo;
+  IOFieldDefPair* busInsId2FieldInfo;
 };
 
 
@@ -81,5 +84,6 @@ uint get_size_of_input_hashmap();
 uint get_size_of_witness();
 uint get_size_of_constants();
 uint get_size_of_io_map();
+uint get_size_of_bus_field_map();
 
 #endif  // __CIRCOM_H